Cadence Introduces New CPU/DSP Core-Based Methodology for SOC Chips

9/1/2004 - Cadence Design Systems, Inc. (NYSE:CDN)(Nasdaq:CDN) and the Shanghai Research Center For Integrated Circuit Design (ICC), China's first national integrated circuit (IC) design industrialization base founded by China's Ministry of Science and Technology, announced the availability of the ICC-Cadence CPU/digital signal processing (DSP) system-on-chip (SoC) reference methodology. The reference methodology, which includes the Cadence Encounter digital implementation platform, IncisiveTM functional verification platform and CoWare software tools for electronic system-level design and verification, is the first to offer rapid and predictable implementation of SoC chip designs for the expanding IC industry in China.

"We are pleased to cooperate with Cadence to cultivate the mainstream design industry in China through this SoC reference methodology project," said Ye Wang, vice director of ICC. "This methodology enables a proven design flow for our mutual customers to quickstart, follow-through and complete their SoC chip designs effectively. This methodology reduces the risk of design failures, ensuring predictable performance and reducing the overall development time to silicon. These elements are particularly important for China's local enterprises to grow their SoC chip business when they are young."

Based on the Cadence EncounterTM digital IC design and Incisive functional verification platforms, the reference methodology was built upon CPU and DSP cores from leading processor IP providers. The implementation flow was validated with several leading foundries on their 0.18-micron processes. The tools supported in the reference methodology include NC-Sim, Conformal®-ASIC, Nano EncounterTM, CeltICTM, Fire & Ice® QXC, VoltageStorm®, SignalStorm® and CoWare ConvergenSC Advanced System Designer through a Cadence and CoWare strategic partnership.

"The ability to implement SoC design quickly and meet the market timeframe is critical for success in today's China IC markets," said Wayne Tang, president of Cadence China operations. "This reference methodology provides the right mix of technologies to address the needs of China's IC design engineers. The result of our successful collaboration with ICC is to provide a complete, one-stop CPU/-based SoC solution. It also symbolizes the Cadence commitment to the China IC industry."

About Shanghai Research Center For Integrated Circuit Design
Shanghai Research Center for IC design (ICC) was established in March 2000 by the Science and Technology Commission of Shanghai Municipality. ICC focuses on promoting Shanghai and all China IC Design industry to realize durative rapid development. ICC set up the public service platform for all IC design enterprises, providing full services to improve design quality and lower the cost. As the executive organization of National IC Design Industrialization Center and National Productivity Promotion Center for IC Design, ICC takes on relevant tasks with the direction of the Ministry of Science and Technology of PRC. The services ICC provides including: Multi-Project-Wafer (MPW) service, Technology Platform service, Training and Evaluation Service, Information Service to name several. Up to now, ICC has provided services to over 200 IC design enterprises in China on more than 400 projects. In addition, ICC is a vice council director of China Semiconductor Industry Association IC Design Branch, a vice council director of Shanghai IC Industry Association, the director of Shanghai IC Industry Association IC Design Branch. The headquarters of ICC is located at Shanghai Hi-tech Kingworld, and they have a branch office in Zhangjiang Pudong. The director of ICC is Mr. Zhang Ao, who is the vice director of Science and Technology Commission of Shanghai Municipality.

About Cadence
Cadence is the world's largest supplier of electronic design technologies and engineering services. Cadence products and services are used to accelerate and manage the design of semiconductors, computer systems, networking equipment, telecommunications equipment, consumer electronics, and other electronics based products. With approximately 4,850 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and trades on both the New York Stock Exchange and Nasdaq under the symbol CDN. More information is available at

About the Cadence / CoWare Partnership
Cadence formed a strategic alliance with CoWare, Inc., a the leading supplier of system-level electronic design automation (EDA) software tools and services based on open industry standards including SystemC, to accelerate time-to-market for system-on-chip (SoC) design teams through a standards-based system-to-silicon-design solution. This multifaceted relationship includes joint development, cross-licensing, a coordinated go-to-market and standards strategy, and provides a unified solution from electronic system-level (ESL) design through RTL implementation for advanced SoC designs and a new connection in the design chain.

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