6/7/2004 - Incentia Design Systems, Inc., an EDA company in the synthesis and timing market, announced the availability of the 2004.05 release of its timing analysis, logic and physical synthesis software products - TimeCraftTM, DesignCraftTM and DesignCraft ProTM.
Incentia's 2004.05 release improves runtime, capacity and quality, when compared to its 2003.09 release.
“We have made significant improvements to our synthesis software, and are very pleased to have our customers report runtime reductions from 12 hours to 2 hours on a 3 GHz Linux platform with our new release,” said Arthur Wei, Vice President of Operation at Incentia.
What’s New: Runtime, Capacity& Quality Improvements, New Platform
Incentia's DesignCraft logic synthesis software achieves a 3X runtime speedup on average when compared to the previous release. One customer reported a 6X speedup in runtime for a 5-million gate design.
The runtime improvement is mainly due to Incentia’s new concurrent CREST (Critical Region Extracting Synthesis Technology) algorithm that identifies multiple critical regions and performs concurrent optimizations. It speeds up important transformations, such as worst and total negative slack optimizations, leakage power optimization, area recovery, design rule and hold time fixes, and DFT optimization.
Quality improvements for timing critical designs include decreased area by up to 10%, and decreased total negative slack by up to 30%.
Incentia's DesignCraft Pro also achieves a 3X runtime speedup on average by applying the concurrent CREST algorithm to its physical optimizations. It improves congestion and routability, and reduces memory usage, so that capacity can increase by up to 15%.
On the quality side, area improves by 10% on average due to an enhanced area recovery algorithm. Total negative slack improves by up to 30%.
Static Timing Analysis
Incentia's TimeCraft static timing analysis software achieves a 2X runtime speedup on average. For example, a customer reported a 4X speedup in runtime for a 11-million gate design under 64 bit Sun Solaris platform. The improvement is due to a proprietary parallel look-ahead pruning algorithm for finding critical paths. Additional analysis features are also available to handle complicated clock tree structures.
In addition to the Linux 32 bit, Sun Solaris 32 bit and 64 bit, and HP 32 bit and 64 bit platforms, all Incentia products are also now available for the AMD 64bit Linux platform.
Incentia’s Synthesis and Timing Software Products
Incentia offers three major products for synthesis and timing analysis. TimeCraft is a full-chip, gate-level static timing analyzer, offering fast analysis speed for timing sign-off and Engineering Change Orders (ECOs). DesignCraft is a logic synthesis tool with datapath, test and low power options. DesignCraft Pro is a physical synthesis tool that solves timing closure and issues and shortens turnaround time. All products are based upon a unified timing engine and database and address the ever growing design requirements of speed, performance and capacity.
Price and Availability
Incentia's 2004.05 release is available now on Sun Solaris (32-bit and 64-bit), Linux (32-bit and AMD 64-bit), and HP (32-bit and 64-bit) platforms. For pricing information, please contact Incentia.
Incentia Design System, Inc. is a leading provider of logic and physical synthesis and timing software that addresses the stringent requirements of runtime, design capacity, timing, area, design for testability and power consumption, and signal integrity for multi-million-gate semiconductor designs. Its products are in use at leading systems design, semiconductor companies and design services companies.
Incentia has offices in Santa Clara, California, and Hsinchu, Taiwan, as well as distributors in Japan, China, Korea, India and Israel. For more information, please visit www.incentia.com, email firstname.lastname@example.org or call 408-727-8988.
DesignCraft, DesignCraft Pro and TimeCraft are trademarks of Incentia Design Systems, Inc.
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