Cadence, CoWare Create Electronic System-Level Design-for-Verification Flow

6/2/2004 - Cadence Design Systems, Inc. (NYSE: CDN) and CoWare® Inc., the leading supplier of system-level electronic design automation (EDA) software and services, announced the availability of an integrated, seamless flow from electronic system-level (ESL) design through verification for complex system-on-chip (SoC) designs. The ESL design-for-verification solution—which marks a major milestone on the strategic alliance roadmap between the companies—enables customers to capture system-level design knowledge and apply it later in the design process to reduce verification time by up to 50%. The flow is based on new integration between the latest releases of CoWare’s SystemC-based ConvergenSCTM SoC design tools and ConvergenSC Model Library and the Cadence® IncisiveTM functional verification platform.

“Providing SystemC models of ARM® IP to enable ESL design is an important step in simplifying the complex SoC design task,” said Duncan Bryan, EDA Relations manager, ARM. “The joint flow of CoWare’s ConvergenSC tools and Cadence’s Incisive platform will enable ARM core-based chip designers to efficiently carry the same SystemC model, software and tests from the system-level design through to chip-level verification. This verification scaling is important to ARM and we welcome these types of alliances.”

“We are pleased to announce this milestone in our ongoing strategic relationship with CoWare,” said Mitch Weaver, general manager, Systems and Functional Verification Division, Cadence. “Through this combined flow, we are providing customers with consistency and assurance within the development environment from system through silicon, greatly reducing risk and time-to-market. Customers will be able to build systems with verified, reusable hardware and software IP blocks faster and with greater confidence that the systems will be right the first time.”

“The increasing size and complexity of designs is creating an enormous opportunity for ESL to impact verification methods,” said Mark Milligan, vice president of marketing, CoWare. “Working together, Cadence and CoWare are applying ESL to eliminate major verification challenges, especially for designs with embedded software.”

Verification Challenges Addressed by ESL
Today, verification engineers must regenerate system-level test cases that attempt to capture system behaviour often known only to the system architect. This is causing an explosion in the resources needed to verify complex SoCs. At the same time, system architects are using high-level models to explore the design space, but verification engineers are unable to reuse those models for RTL verification. This risks a loss of design intent and lack of insight into potentially fatal design flaws.

Embedded software developers are facing similar challenges. To debug their embedded software, developers must often wait for prototypes, which arrive too late in the design process. Alternative RTL co-verification techniques are too slow, and also present challenges for the software developer who may not understand the unverified RTL.

The Cadence/CoWare ESL Design-for-Verification Flow
With the unified flow, system architects can rapidly explore the design space in ConvergenSC and determine the optimal system architecture for the SoC. Using SystemC transaction level models (TLM), which can deliver simulation speed greater than 10,000 times faster than RTL, the architecture is evaluated using realistic system scenarios with software. These models also provide the accuracy needed for system analysis and optimisation. The SystemC model and ConvergenSC software analysis is used by software developers to validate and optimise embedded software early in the design process.

Once validated, the SystemC model becomes a functional virtual prototype (FVP) with an embedded software testbench. Verification engineers use ConvergenSC technology to rapidly reconfigure the FVP as a heterogeneous model. This heterogeneous model in the Incisive platform allows the verification engineer to re-use the knowledge captured in the system to verify the RTL at over 100 times the simulation performance of an all RTL system.

How It Works
ConvergenSC and the Incisive platform include new capabilities to enable the joint flow:

Cadence Incisive 5.3 and CoWare ConvergenSC 2004.1 are available now worldwide. For pricing information on Cadence products, contact your local sales office or go to For pricing information on CoWare products, contact your local sales office or email For more information, visit

About Cadence
Cadence is the largest supplier of electronic design technologies and engineering services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 4,800 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centres, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at

About CoWare
CoWare is the leading supplier of system-level electronic design automation (EDA) software tools and services. CoWare offers a comprehensive set of electronic system-level (ESL) tools that enable SoC developers to “differentiate by design” through the creation of system-IP including embedded processors, on-chip buses, and DSP algorithms; the architecture of optimised SoC platforms; and hardware/software co-design. The company’s solutions are based on open industry standards including SystemC. CoWare’s customers are major systems, semiconductor, and IP companies in the market where consumer electronics, computing, and communications converge. CoWare’s corporate investors include ARM Ltd. [(LSE:ARM);(Nasdaq: ARMHY)], Cadence Design Systems (NYSE:CDN), ST Microelectronics (NYSE:STM), and Sony Corporation (NYSE:SNE). CoWare is headquartered in San Jose, Calif., and has offices around the world. For more information about CoWare and its products and services, visit

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. Incisive is a trademark of Cadence Design Systems, Inc. in the U.S. and other countries. ConvergenSC is a trademark of CoWare, Inc. CoWare is a registered trademark of CoWare, Inc. in the United States.

ARM is a registered trademark of ARM Limited. “ARM” is used to represent ARM Holdings plc [(LSE: ARM); (Nasdaq: ARMHY)]; its operating company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; and ARM Belgium N.V.

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