5/27/2004 - A number of 3D chip scale packaging studies conducted by VDC indicate that 3D chip scale packaging solutions will play an increasingly vital role in meeting performance and size requirements for future generations of mobile electronics.
3D chip scale packaging refers to the vertical (Z-axis) stacking of multiple die within a package, or multiple packages, using specialized substrates and interconnects. Earlier advanced IC packaging solutions - such as ball grid array (BGA) and chip scale package (CSP) - have succeeded in decreasing package sizes while increasing I/O count and overall component performance, but their capabilities are falling short in today's more mobile-oriented technology landscape.
3D chip scale packaging solutions help to meet size and performance requirements by providing the following benefits:
* Statistics provided by DARPA ("COTS Designers Turn to Hybrid Packaging." Military and Aerospace Electronics)
Although 3D chip scale packaging exceeds many performance demands, some challenges still exist. Mobile device manufacturers that VDC recently spoke to expressed their concerns about the viability of 3D chip scale packaging, including:
As demands on portable devices increase and they become smaller, lighter and more feature-rich, the vertical stacking techniques employed in 3D chip scale packaging solutions may become more attractive to mobile device manufacturers. VDC provides insight into this emerging market by providing granular, relevant analysis of 3D chip scale packaging, including technical, developmental and commercialization considerations.
About VDC's 3D Chip Scale Packaging Solutions: A Global Market Assessment
Since 1971, VDC has been a leading source of market research and consulting services for a host of electronic component and embedded technologies (CPU boards, chipsets, ASICs, and other discrete components), presenting granular and accurate market estimates, conservative forecasts, and relevant trend analyses through detailed market segmentations. VDC now turns its attention to the emerging 3D chip scale packaging market.
This study will quantitatively and qualitatively assess market demand for components of 3D packaging technology, identify current and emerging applications, and evaluate strategies within the industry to address technical and marketing challenges. The report will include:
VDC is now accepting founding sponsors for this research. Benefits of becoming a founding sponsor include:
Founded in 1971, VDC is a technology market research and consulting firm that specializes in industrial and commercial electronics, computing, communications, software and power systems markets.
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