ASIC Group Offers 50+ Tips for Creating Better Verilog Designs

5/6/2004 - The ASIC Group, a design and verification services provider, announced that it is offering a free Verilog Tips book for download at its site

The Verilog Tips book offers more than 50 tips for creating better, faster and more correct Verilog hardware description language (HDL) designs.

"Most Verilog users lament the fact that the language can be both very flexible and painfully unstructured," remarked L. Eric Culverson, author of the PracticalHDL multimedia training course from Technically Speaking. "This book offers clear and concise recommendations for getting the most from your RTL or behavioral code, while promoting much needed standardization, and is a handy reference tool that every Verilog designer should have."

"We believe that designers need ready access to the best design tips to help them do their designs using the best proven practices," said James M. Lee President of The ASIC Group. "Our tips are compiled from years of experience and many successful ASIC designs."

About The ASIC Group
The ASIC Group provides expert design and verification services for ASIC, ASSP and SOC designs. Each member of the ASIC Group's design staff has 15 or more years of electronic design experience, and has successfully developed chips for such industry titans as IBM, LSI Logic, Qualcom and Seagate. The company's offerings include: SOC and ASIC design services, verification services, EDA tool evaluation, design methodology services, design audits, FPGA prototyping, FPGA to ASIC conversion, bug fixes and ECOs as well as training. Its staff has designed disk drives, disk controllers, RAID controllers, PCI bus interfaces, portable and low power devices, graphics chips, as well as GPS, HDTV, digital signal processing and medical devices.

For more information, please visit, phone 510-796-4863 or email

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