Renesas Packs Diver IC and Two Power MOSFETs into Integrated SiP

4/21/2004 - Renesas Technology Corp. announced the system in package (SiP) device, "Driver-MOSFET Integrated SiP" that integrates a driver IC and two power MOSFETs with both high-side and low-side functions. Available in a QFN 56-pin package, the SiP device is suitable for voltage regulators that manage the switching operation of CPUs used in PCs and servers.

In the initial phase, Renesas Technology is releasing the R2J20601NP, a power MOSFET device that enables higher frequency and efficient operation of voltage regulators, while maintaining its compact size. Sample shipments will begin in Japan on April 21, 2004.

Integrating a driver and both high-side and low-side power MOSFETs, the new device is also compliant with the package standard "Driver-MOSFET integrated SiP (DrMOS)," proposed by Intel Corporation. Features of the new product are summarized below.

  1. Industry Top Efficiency of 87% max. at 1 MHz Operation
    The new SiP device achieves a maximum efficiency of 87% (Vin = 12 V, Vout = 1.3 V), the best in the industry, when operating at 1 MHz. Efficiency is 83% with a 25 A output current. This is a 6% improvement over the earlier HAT2168H and HAT2165H high-performance power MOSFET combination devices offered by Renesas. The increased efficiency and higher frequency operation allows the use of smaller and fewer passive devices, such as inductors and capacitors, thereby making it possible to make the voltage regulator substantially more compact. High power supply efficiency also contributes to reduced power consumption.
  2. Requires Less than Half the Mounting Area of Previous Renesas Devices
    The SiP package integrating the voltage regulator driver IC and high-side and low-side power MOSFETs conforms to the DrMOS specification. It is a compact 56-pin QFN package (8 8 0.8 mm) that requires less than half the mounting area of a conventional group of three discrete (SOP-8 package) devices. This results in a significant reduction in the size of the voltage regulator.

In the age of broadband the data handled by PCs and servers has increased in volume and become more complex. This has caused CPU clock frequencies to rise and resulted in a corresponding increase in power consumption. At the same time, smaller, low-voltage CPUs are proliferating. These trends toward higher speed, lower voltage, and higher current have created increased demand for compact voltage regulators that are more responsive (high di/dt), operate on reduced voltage, and can accommodate higher current levels.

In response to the demand for high-frequency and highly efficient voltage regulators, Renesas has put into mass production the N-channel power MOS FET series of high-performance power MOSFET devices employing a 0.35 m process.

However, if the trend toward reduced voltage and increased current proceeds from the present 1.3 V and 70 A output to 0.8 V and 150 A output in the future, generally speaking, incorporating passive components such as inductors and capacitors into voltage regulators by extending current technology and methods would involve a substantial increase in mounting area equivalent to some 30% of the typical motherboard, just for the voltage regulator. It is therefore necessary to move to a higher operating frequency in order to reduce the number and mounting area of such passive components. However, increasing the operating frequency of a power MOSFET results in increased switching loss and reduced efficiency. Using conventional technology and methods it is not possible to achieve high efficiency at frequencies above 1 MHz.

To create a voltage regulator combining high-frequency and high-efficiency operation it was necessary to improve each of the individual devices incorporated into the power MOSFETs and also to reduce the parasitic inductance of the wiring between the devices. By integrating the driver IC and high-side and low-side power MOSFETs into a single package a substantial increase in efficiency has been achieved together with significant miniaturization. The result is the new SiP device "Driver-MOSFET Integrated SiP".

The Driver-MOSFET Integrated SiP is the industry's first SiP device to integrate a voltage regulator high-side MOSFET, low-side MOSFET, and driver IC into a 56-pin QFN package. Incorporation into a single package means that the parasitic inductance of the wiring between the devices is reduced to a minimum. In addition, the power MOSFETs were develped by optimizing the industry's top-performance 8th generation devices, employing 0.35 m process, for this SiP device. MOSFET on-off control is optimized in the driver IC.

The 56-pin QFN package is leadless and conforms to the SiP package specification DrMOS. It is the most compact DrMOS package (8 8 0.8 mm) and provides excellent heat dispersion. Die pads occupying half of the bottom side of the package are used for the high-current routes to provide effective heat dissipation.

The first model to be made available, the R2J20601NP, uses 12 V input and is ideal for low-voltage applications. For example, under conditions of f = 1 MHz, Vin = 12 V, and Vout = 1.3 V, it provides the industry's top efficiency of 87%, and 83% efficiency when Iout = 25 A. Thanks to its high operating frequency, passive components such as inductors and capacitors are reduced in number and size, making the voltage regulator much smaller overall. The improved power supply efficiency also contributes to reduce power consumption.

In future Renesas plans to develop versions of the device with higher output power capacity and compatibility for high input voltages for use in laptop PCs.


Sample Price (Yen) in Japan
R2J20601NP 56-pin QFN 660 (693 with tax)


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