Synplicity Enhances Certify Prototyping Software for Large ASICs

4/19/2004 - Advancing its leadership position within the ASIC prototyping market, Synplicity Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, announced key enhancements to its Certify® prototyping software, the only verification solution that provides ASIC to multi-FPGA prototype implementation for designers doing in-system and hardware/software verification. The latest version of the Certify software includes support for the 64-bit Solaris operating system, enabling customers to synthesize larger prototypes in a single pass without having to artificially break up the design into smaller pieces. With its support of the latest workstation environments, Synplicity believes the Certify software continues to be the ASIC prototyping solution of choice for designers performing multi-FPGA prototyping.

In its efforts to continue offering customers support for a variety of board vendors, Synplicity also announced today White Eagle Systems has been added as a new hardware board partner for the Certify software and is now part of Synplicity’s Partners in Prototyping Program. Synplicity established the first-of-its-kind Partners in Prototyping Program for designers looking for complete, rapid prototype development solutions. The Certify software also leverages the latest version of Synplicity’s industry-leading Synplify Pro® synthesis software. Synplicity believes the synchronization with the compilers and mappers from the Synplify Pro 7.3.4 software offers designers the best optimization technology for faster ASIC prototypes.

“We believe our Certify product is the most comprehensive ASIC prototyping solution available today,” said Brian Caslis, director of marketing for the Certify product line at Synplicity. “Although some competitive solutions claim to tackle prototyping challenges, they do not address some of the most complex issues associated with prototyping, including automatic RTL partitioning and automatic I/O multiplexing. The automation of many of these complex tasks within the Certify software enables us to eliminate many of the unnecessary complexities of ASIC prototyping, allowing customers to take advantage of this form of verification. Customers interested in prototyping partial ASICs or blocks of IP can use our Synplify Pro tool, which offers the same core optimization and gated-clock conversion capabilities.”

Synplicity delivered the industry’s first ASIC prototyping software nearly five years ago and since then, the software has introduced many key innovations, enabling huge productivity gains for FPGA-based ASIC prototyping. Certify includes gated-clock conversion, multi-chip timing analysis, I/O multiplexing insertion, and a host of other detailed capabilities. Additionally, Synplicity introduced Quick Partitioning Technology, an automated, push-button flow that partitions an ASIC into multiple FPGAs, including custom boards, off-the-shelf boards and reconfigurable hardware. Synplicity also created its unique Partners in Prototyping Program, a formalized system that qualifies pre-fabricated multi-FPGA hardware platforms and includes their board files within the Certify tool, thereby eliminating the need for customers to design and build their own custom prototyping platforms.

Support for Solaris 64-bit Design Environments
The latest version of the Certify software becomes the first prototyping solution to take full advantage of the Solaris 64-bit operating system, utilizing 64-bit address space for access to more memory. This feature is especially useful for synthesizing the largest ASIC designs, which can now be prototyped all at once and are limited only by the memory available on their workstation. With support for the latest workstation environments, the Certify software is able to read in the entire RTL code from large ASICs, such as 10 million gates and up, and partition and synthesize them without requiring any changes to the design.

White Eagle Systems Added to Partners in Prototyping Program
As the latest member of the Partners in Prototyping Program, White Eagle Systems has delivered a unique methodology for building FPGA-based prototypes quickly and easily, further speeding the overall ASIC design and development cycle. Documentation and technical information for this latest partner and its Scallopwing board are now available on the Partners in Prototyping Web page on the Synplicity Web site. The Certify software also includes Scallopwing board files, allowing designers to begin prototyping their designs immediately. The addition of White Eagle Systems brings the total number of board partners to eight, which also includes AMO, The Dini Group, EVE, Hardi Electronics, Gidel, Nallatech and ProDesignElectronics Corporation.

White Eagle Systems’ Scallopwing board features very large capacity in a reconfigurable hardware environment. The standard configuration contains four XC2V8000 Xilinx Virtex-II devices with 32 million system gates of programmable logic.

“The combination of Synplicity’s Certify software and White Eagle’s high-capacity Scallopwing board offers our mutual customers a great value for ASIC prototyping,” said, Jim Tobias, President, White Eagle Systems Technology. “The leading-edge features within the Certify software demonstrate Synplicity’s commitment to offering solutions that remove the guesswork from the prototype development process. We believe by combining our expertise in emulation technology with the Certify-based RTL prototyping methodology, our customers will be able to deliver superior solutions, achieving a vital competitive edge.”

Pricing and Availability
The Certify 6.4 software is available now. Pricing for the Certify software starts at $45,000 (U.S.) for a one-year time-based license. Current Certify customers on maintenance will be upgraded at no additional cost.

About the Certify Software
The Certify software is believed to be the industry’s only register transfer level (RTL) prototyping solution that enables designers to create functional hardware prototypes of their ASIC design automatically at the RTL, prior to ASIC synthesis. Verification at this early stage of design results in a dramatic increase in productivity and enables faster time to market, especially for one-million-gate-plus ASIC/SoC designs. Synplicity believes that prototypes defined by the Certify product will enable extensive verification, allowing ASIC designers to perform the following tasks at- or near-system speed: hardware/software co-verification; algorithm development and verification; verification of intellectual property, either cores or library elements; system software development and debugging; verification of system-level protocol compatibility and early system/product development with FPGAs.

About Synplicity
Synplicity® Inc. (Nasdaq: SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity’s high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers. The company’s underlying Behavior Extracting Synthesis Technology® (BESTTM), which is embedded in its logical, physical and verification tools, and has led to Synplicity’s top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company’s fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 270 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information visit

Synplicity, Behavior Extracting Synthesis Technology, Certify and Synplify Pro are registered trademarks of Synplicity, Inc. BEST is a trademark of Synplicity Inc.

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