3/11/2004 - Cadence Design Systems, Inc. (NYSE:CDN) announced that Motorola, Inc. (NYSE: MOT) has successfully completed a wireless baseband chip implemented in 90-nm silicon technology, using the Cadence® EncounterTM digital IC design platform. Motorola used Cadence First EncounterTM silicon virtual prototyping and NanoRouteTM nanometer routing technologies to tape out their design on schedule. The new generation technology behind the Cadence Encounter platform demonstrates that it provides an integrated and fast route to quality silicon, particularly for complex, high-performance system-on-chips (SoCs).
"The Wireless Design Team of Motorola, Inc. in Austin used the Cadence tools in 2003 with the design of a 90-nm baseband processor chip," said Bart Martinec, Chip Integration Leader, Motorola Semiconductor Wireless and Mobile Systems Group. "We used First Encounter to help us quickly determine whether a particular chip floorplan would meet our frequency and die size targets. NanoRoute then completed the chip with no design rule violations. We consider our use of Encounter and our association with Cadence a success."
At nanometer geometries, system-on-chip performance is dominated by the timing and noise behavior of the chip's routed wires. The Cadence IC implementation strategy focuses on these wires very early, beginning with a silicon virtual prototype and continuing through final routing. By creating an accurate physical picture of the design at the very beginning of chip implementation, designers can significantly improve the predictability of their overall schedule.
"Designing at 90 nm in 2003 was entering new territory, open only to the most advanced and aggressive design teams," said Wei-Jin Dai, platform vice president, digital IC implementation, Cadence Design Systems, Inc. "We're thrilled and honored to have supported Motorola with this effort. Our goal is to minimize our customer's time to market and time to profit. This is another exciting Encounter validation in a leading-edge production environment."
Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 4,800 employees and 2003 revenues of approximately $1.1 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at www.cadence.com.
Cadence and the Cadence logo are registered trademarks, and Encounter, First Encounter, and NanoRoute are trademarks of Cadence Design Systems, Inc.
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