Synplicity Enhances Support for Xilinx's ISE 6.2I with FPGA Synthesis

3/1/2004 - Synplicity Inc. (Nasdaq: SYNP), a leading supplier of software for the design and verification of semiconductors, announced it has enhanced its FPGA synthesis and physical synthesis software to provide optimized support for the latest version of Xilinx’s Integrated Software Environment (ISETM). The Synplify Pro® software and Amplify® Physical OptimizerTM software provide enhanced timing correlation and an improvement in overall quality of results (QoR), playing a large role in the performance advantage announced separately today by Xilinx in its ISE 6.2i press release. In addition to offering Synplicity’s signature benefits, such as fast runtimes and ease of use, the Synplify Pro 7.5 and Amplify 3.5 tools build upon Synplicity’s true timing-driven synthesis technology to provide designers with just enough performance to meet timing goals while using the smallest and least costly device possible.

“We believe the tremendous improvements in both performance and cost reduction of modern programmable logic is leading to the widespread adoption of FPGAs in a variety of applications,” said Jeff Garrison, director of marketing for FPGA products at Synplicity. “Synplicity’s latest round of enhancements reflects our commitment to provide the tools that will continue to push the envelope with regards to performance and cost reduction and expand the use of FPGAs by electronics designers. Additionally, we continue to work closely with Xilinx to seamlessly integrate our synthesis technology within its ISE 6.2i software to enable our mutual customers to have an extremely productive design environment for their FPGAs.”

“By offering enhanced support for our ISE 6.2i release with their latest FPGA synthesis and physical synthesis products, Synplicity has contributed to the 40 percent performance advantage of Virtex-II Pro FPGAs over the closest competition,” said Jerry Banks, director of Global Alliances at Xilinx. “Together, Xilinx and Synplicity continue to address customers’ requirements for high-performance and cost-efficient designs.”

Supporting all Xilinx FPGA families, the Synplify Pro 7.5 tool now includes an automatic constraint feature that incrementally bumps up timing constraints to achieve a maximum clock frequency. This feature has achieved performance within 5 percent of that accomplished by hand tuning timing constraints on several designs tested, making it useful for a quick estimate of what performance can be expected with a particular HDL design.

The Synplify Pro software also includes new enhancements to the compiler including support for Multidimensional Arrays in Verilog 2001. This feature is used to group elements into multidimensional objects, called vector types, making coding much more concise. Other new attributes added to the Synplify Pro software include a global buffer attribute and a keep hierarchy attribute. The syn_global_buffer attribute allows the user to specify the maximum number of global clock buffers to be used in the design. The xc_use_keep_hierarchy attribute is used to pass Xilinx’s keep hierarchy attribute to Xilinx’s back end tools. This is useful in modular and incremental design flows where the user wants to lock down a portion of the design and performs no additional optimizations on it. Additionally, this release includes a new Errors, Messages, and Warnings Guide, which offers tips on what to do when confronted with certain error messages.

About Synplicity’s FPGA Synthesis and FPGA Physical Synthesis Software Synplicity’s Synplify® software helps programmable logic designers rapidly achieve aggressive performance objectives. The Synplify software takes designs written in VHDL or Verilog as input, and compiles, optimizes and maps them into efficient, high-performance netlists for leading CPLD and FPGA devices. The Synplify Pro software offers high quality of results and fast runtimes along with an expanded feature set optimized to increase performance and productivity for today’s complex programmable devices.

The Amplify Physical Optimizer software is the first physical synthesis tool for FPGAs. The Amplify software improves circuit performance and timing closure and accelerates productivity by performing simultaneous placement and logic optimization during the synthesis process. The Amplify Physical Optimizer product has been used in hundreds of programmable logic designs around the world.

Pricing and Availability
The Amplify 3.5, Synplify 7.5 and Synplify Pro 7.5 software are available now. Pricing for the Amplify software starts at $29,000 (U.S.). Pricing for the Synplify software starts at $9,500 (U.S.) and pricing for Synplify Pro software starts at $20,000 (U.S.). For more information about Synplicity’s products, contact Synplicity at The Xilinx ISE 6.2 software is available now through Xilinx.

About Synplicity
Synplicity® Inc. (Nasdaq: SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity’s high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers. The company’s underlying Behavior Extracting Synthesis Technology® (BESTTM), which is embedded in its logical, physical and verification tools, and has led to Synplicity’s top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company’s fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 270 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information visit

Synplicity, Amplify, Behavior Extracting Synthesis Technology, Synplify and Synplify Pro are registered trademarks of Synplicity, Inc. BEST and Physical Optimizer are trademarks of Synplicity Inc.

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