Sequence Takes NanoCool Low Power Design Seminars to Japan and Korea

11/4/2004 - Sequence Design, the accuracy and performance leader for power integrity tools, announced the next two locations, Tokyo and Seoul, for its NanoCool seminars. Artisan Components, Inc. (Nasdaq:ARTI - News), Sun Microsystems and Forte Design Systems will sponsor the NanoCool Tokyo seminar on November 10, 2004. Speakers from the sponsoring companies, as well as Toshiba and Tensilica will explore logic and physical low-power design methodologies. Sequence will continue the series in Seoul, Korea, on November 12, 2004.

RTL power estimation, designing for power using behavioral synthesis and SystemC, voltage-drop analysis, power modeling, power grid design and leakage reduction will all be explored during the seminar. Kimiyoshi Usami, professor at the Shibaura Institute of Technology, will be the keynote speaker at the Tokyo seminar.

The NanoCool technology seminars will offer primers on how to apply methodologies. "These seminars will give designers an ESL to gate-level perspective on how to efficiently manage power," said Vic Kulkarni, president and CEO at Sequence Design. "Companies in Japan and Korea have been at the vanguard of low-power design. Under our NanoCool initiative, we have worked closely with Toshiba and Artisan to create advanced methodologies in areas such as leakage power reduction. Attendees will get a first hand view of a collaborative power integrity flow."

According to Neal Carney, Artisan's vice president of marketing, "To help designers overcome the complex nanometer design challenges and to gain greater confidence in meeting power and performance budgets, it's important to provide IP that supports various power reduction solutions and includes accurate power and signal-integrity modeling."

At 90 and 65 nanometers, power is becoming a 'first-order' effect. "The power problem is the No. 1 issue in the long-term for computing. It's time for us to stop making 6-mile-per-gallon gas guzzlers," said Greg Papadopoulos, chief technology officer with Sun Microsystems (SJ, Mercury News, 7/2/04).

Designers can have the greatest impact on reducing power at the 'front-end' of the design process. "The understanding and management of a design's power characteristics have never been more important," added Brett Cline, vice president of marketing at Forte. "By utilizing behavioral synthesis techniques with advanced power estimation and analysis, design teams will have a clearer understanding of how power will affect their design earlier in the design process when options are still available."


The Challenges to Power Management
The earliest forms of low power design involved the basic practice of reducing the power supply voltage, either in the entire design or in certain parts. The attractiveness of this approach was, and still is, the quadratic relationship between the supply voltage and the resulting power consumption. An additional method involved the use of more advanced semiconductor processes with narrower transistors and shorter wires -- all else being equal, the reduction in parasitic capacitances due to the smaller geometries resulted in less dynamic power.

Today, these approaches are no longer enough and in some cases -- such as sub-threshold leakage -- counter productive.

"10X reductions in leakage can be achieved through the use of power gating techniques," said Jerry Frenkil, Sequence's chief technology officer.

"A designer can have the greatest impact on reducing power at the RTL level," said Tom Miller, vice president, power analysis products with Sequence. "Methodologies are now being explored at ESL as well for views at even higher levels of abstraction."

"Being able to run power analysis at RTL is very important because it allows us to get a handle on power consumption very early in the design process, and then make appropriate changes to reduce power," said Himanshu Sanghavi, hardware engineering manager, Tensilica. "By getting these insights at RTL, we can meet our power goal more efficiently. The time for a more comprehensive power integrity solution is now."

The Japan seminar will take place at Academy Hall at ARK Academy Hills, Tokyo on November 10, 2004. To register, please visit For additional information regarding the Tokyo and Seoul seminars, please contact

NanoCool Initiative
NanoCool is a collaboration among semiconductor designers, EDA tool vendors, IP companies and library suppliers, to provide a complete power integrity flow that includes concurrent voltage-drop and power management, timing and signal-integrity capabilities to help achieve rapid electrical sign-off and design closure at 130 nanometer and below.

About Sequence
Sequence Design, Inc. enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to fabrication. Sequence's power and signal integrity software give its more than 130 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of nanometer design.

Sequence has worldwide development and field service operations. The company was recently named by Reed Electronics as one of the top 10 companies to watch in the electronics industry. Sequence is privately held. Sequence is a member of Cadence Design Systems' Connections(TM) and Mentor Graphics' Open Door(TM) partnership programs. Additional information is available at

About Artisan Components
Artisan Components, Inc. is a leading provider of physical intellectual property (IP) components for the design and manufacture of complex system-on-a-chip integrated circuits. Artisan's products include embedded memory, standard cell, input/output, analog and mixed-signal components, which are designed to achieve the best combination of performance, density, power and yield. Artisan has licensed its IP components to over 2,000 companies involved in integrated circuit design. Artisan is headquartered in Sunnyvale, California. More information about Artisan Components, including free library access, can be found at

About Forte Design Systems
Forte Design Systems is a leading provider of software products that enable design at a higher-level of abstraction. Forte's innovative Cynthesizer behavioral synthesis ( product allows design teams creating complex electronic systems from algorithmic designs using ASICs, SoCs, and FPGAs to significantly reduce their overall design and verification time. Forte is headquartered at 100 Century Center Court, San Jose, CA 95112. For more information, visit us at

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