10/21/2004 - Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design solutions, announced that it will be participating in the International Test Conference (ITC) Oct. 26-28 in Charlotte, NC. Product demonstrations of the Physically Aware DFTTM capabilities within Blast CreateTM, including integrated design for test (DFT) analysis and scan insertion, and of Magma’s complete RTL-to-GDSII design system will be available in booth 1329. Overviews of newly released interfaces to Teseda’s V500 DFT validation and debugging tools and interoperability with third-party DFT providers such as Mentor Graphics, LogicVision and SynTest will also be offered.
Magma’s R. Dean Adams, Ph.D., director of product development for DFT products, will be giving a tutorial entitled, “Memory Test and Self-Test for Deep-Submicron Technologies.” The one-day tutorial will be held at ITC on Sunday, Oct. 24 at 8:30 a.m. EDT.
“Since we announced the new DFT capabilities in Blast Create last May, we’ve had tremendous interest,” said Yatin Trivedi, director of product marketing for Magma. “ITC will give us a perfect opportunity to introduce this new technology to design managers and test engineers.”
“DFT can no longer be an afterthought or performed as a back-end task. Today’s complex SoC designs require that testability be an integral part of the physical implementation process,” said Dwayne Burek, director of product engineering for DFT products at Magma. “By providing physically aware DFT that is interoperable with third-party solutions, Magma offers customers the flexibility to choose a flow that results in an overall improvement in the quality of design and a reduction in the cost of test.”
At the ITC corporate presentation sessions on Sunday, Oct. 24 at 2 p.m., Mr. Burek will give a presentation entitled, “Magma’s Physically Aware DFT Strategy.”
Blast Create’s Physically Aware DFT Capabilities Speed Front-end Flow
To ensure that logic is functional as well as testable, Blast Create performs DFT analysis in conjunction with synthesis. Top-down and bottom-up scan insertion capabilities support various DFT methodologies, including those with intellectual property (IP) that have pre-inserted scan. Blast Create performs more than 60 RTL DFT checks early in the design phase to assess the effect of testability on timing, area and power, preventing designers from wasting valuable synthesis and optimization time on poorly coded RTL.
Magma’s software is based on a unified data model. This provides Blast Create and its DFT capabilities with critical logical, physical and electrical information about the design and the process rules. With this information, the system can take into account common defects in a particular process during the design flow. As a result, this physically aware DFT technology delivers higher quality, faster design turnaround time and efficient use of tester time.
Magma provides leading software for designing highly complex integrated circuits while maximizing Quality of Results with respect to area, timing and power, and at the same time reducing overall design cycles and costs. Magma provides a complete RTL-to-GDSII design flow that includes design planning, prototyping, synthesis, place & route, and signal and power integrity chip design capabilities in a single executable, offering “The Fastest Path from RTL to Silicon”TM. Magma's software also includes products for advanced physical synthesis and architecture development tools for programmable logic devices (PLDs); capacitance extraction; and characterization and modeling. The company’s stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
Magma and Blast Fusion are registered trademarks and Blast Create, physically aware DFT and “The Fastest Path from RTL to Silicon” are trademarks of Magma Design Automation Inc.
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