Lattice Announces ispLeverCORE IP for LatticeECP and LatticeEC FPGAs

10/6/2004 - Lattice Semiconductor Corporation (NASDAQ: LSCC), announced the immediate availability of several key ispLeverCORETM intellectual property (IP) modules for its recently announced LatticeECP-DSPTM and LatticeECTM FPGAs. The initial IP modules available allow users to rapidly complete designs for functions as diverse as Ethernet, Reed Solomon, PCI and DMA. These modules, along with others that will become available over the coming months, complement the ispLeverCORE Connection IP cores available from Lattice's third party partners, as well as Lattice's free, industry-standard Reference Designs.

"Lattice is excited to provide designers the unbeatable combination of its next-generation ECP and EC FPGA devices and a comprehensive library of IP modules that allows them to quickly design a variety of the most popular application functions," said Stan Kopec, Lattice vice president of corporate marketing. "Effective design tools and IP are now as integral to successful programmable logic design as silicon. Our ispLeverCORE modules are designed to the highest coding standards, and are extensively tested to meet required functionality and performance. These cores are ready-to-use, well-documented, and fully supported by Lattice field and factory engineers," Kopec concluded.

ispLeverCORE IP for LatticeECPTM and LatticeEC Devices
The Lattice ispLeverCORE IP products represent a range of rigorously designed and verified solutions that implement standardized functions commonly used in FPGA designs. Evaluation netlists, which allow the IP to be combined and simulated with the user's logic, can be downloaded for free from Lattice's Web site, IP cores for the LatticeECP and LatticeEC devices that are currently available for download include:

Additional IP modules that Lattice intends to make available for its ECP and EC devices include DDR Memory Controller, FCRAM Memory Controller, Viterbi Decoder, Turbo Decoder, and Numerically Controlled Oscillator. For its LatticeECP-DSP devices, Lattice is developing a range of DSP-oriented IP that utilizes the sysDSPTM blocks embedded in the device. IPs that Lattice intends to make available include popular functions such as Finite Impulse Response (FIR) Filters and Fast Fourier Transforms (FFTs).

ispLeverCORE Connection IP and Reference Designs for LatticeECP and LatticeEC Devices
In addition to ispLeverCORE IPs, the Lattice Web site includes details of IP cores for the LatticeECP and LatticeEC FPGAs available from Lattice's ispLeverCORE Connection partners: CAST, Digital Core Design (DCD) and Eureka Technology.

The Lattice partners program is designed to allow customers to easily access and integrate approved third-party IP products using Lattice programmable devices. "Partner IP support for our new FPGA families continues to grow rapidly," said Kopec. "We're pleased to continue our partnerships with CAST, DCD and Eureka Technology, and very excited by the increased IP core performance that each has achieved using our new ispLEVER® design tool software."

CAST ( IP cores for the LatticeECP and LatticeEC devices include CAN Bus and 1394a functions. DCD ( provides a variety of microprocessor and peripheral functions, including 8051 and PIC compatible microprocessors. Eureka Technology ( provides a variety of bus interface functions and a CompactFlash/PCMCIA Host Adapter IP.

Lattice also has free reference designs now available for the LatticeECP and LatticeEC devices to support functions including:

About the LatticeECP-DSP and LatticeEC FPGA Families
Announced June 28, 2004, the LatticeECP-DSP and LatticeEC FPGA device families are architected to provide the most optimized feature sets combined with the lowest total solution costs of any FPGAs. The new LatticeECP-DSP products, targeted for high-performance DSP applications, provide up to a 50% performance and 75% logic utilization improvement over other low-cost solutions when implementing common DSP functions. The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is a precise and targeted response to the market's explosive demand for low-cost, architecturally streamlined logic solutions. Through advanced 130nm silicon technology, an optimized architecture and proprietary circuit design, the new Lattice devices lower total solution costs by up to 30% to 50% compared with existing FPGA solutions, and are expected to broaden the adoption of FPGAs within the $20 billion ASIC marketplace.

The first available devices, the LatticeECP20/EC20, are in production and shipping to customers. The remaining LatticeECP and LatticeEC devices are expected to sample in the fourth quarter of 2004, with production release scheduled in the first half of 2005.

About Lattice Semiconductor
Lattice Semiconductor Corporation designs, develops and markets the broadest range of Field Programmable Gate Arrays (FPGA), Field Programmable System Chips (FPSC) and high-performance ISPTM Programmable Logic Devices (PLD), including Complex Programmable Logic Devices (CPLD), Programmable Analog Chips (PAC), and Programmable Digital Interconnect (GDX). Lattice also offers industry leading SERDES products. Lattice is "Bringing the Best Together" with comprehensive solutions for today's system designs, delivering innovative programmable silicon products that embody leading-edge system expertise.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, visit

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