9/16/2003 - Rambus Inc. (Nasdaq: RMBS), a leading provider of chip-to-chip interface products and services, and Synopsys, Inc. (Nasdaq: SNPS), the world leader in semiconductor design software, announced a collaboration to develop a hardware platform that demonstrates the interoperability of their PCI ExpressTM IP solutions. Rambus is providing the RaSer PHY for PCI Express applications, and Synopsys is providing the DesignWare® PCI Express Endpoint Controller Core. Synopsys and Rambus expect to demonstrate a working PCI Express solution that provides seamless operation and lower-risk implementation for chip developers at the PCI Express Interoperability Workshop in the fourth quarter of 2003.
"Synopsys, the market leader in connectivity IP, works closely with leading PHY suppliers, like Rambus, to bring our collaborative solution to compliance testing workshops and demonstrate interoperability," said Guri Stark, vice president of Marketing, Synopsys Solutions Group. "By Demonstrating interoperability and our advanced verification procedures, we can demonstrate the high quality of our PCI Express IP and reduce risk for our customers that are planning to use the joint solution."
"With this platform, system developers can be assured that they are using IP cells that are proven to interoperate across the PCI Express protocol stack and with other PCI Express systems," said Jean-Marc Patenaude, marketing director of the Logic Interface Division at Rambus. "Rambus has already delivered fully-verified silicon supporting the PCI Express interface - our decade-long experience in solving high-speed I/O problems continues to be of great benefit to our customers, who now face the challenge of migrating their 66MHz PCI designs to new 2.5GHz PCI Express solutions."
The platform demonstration will consist of two boards: a motherboard, constructed by Synopsys, using FPGAs to house the Synopsys Endpoint Controller with driver software, and a daughterboard consisting of Rambus' PHY IP. The interface between the two boards will adhere to the industry-standard PIPE (PHY Interface for PCI Express) specifications. Synopsys' motherboard will include three critical protocol layers (the Logical PHY layer, the Data Link layer and the Transaction layer), while Rambus' daughterboard will include the analog PMA (Physical Media Attachment) sub-layer and the PCS (Physical Coding Sub-Layer).
Rambus is committed to continuing its leadership position as a PCI Express PHY IP provider. Rambus' PCI Express IP PHY family supports TSMC 0.13-micron and UMC 0.18-micron processes to address needs of graphics, chipset, switch and bridge chip applications using the PCI Express standard. The Rambus PCI Express PHY cell is available in evaluation chips that have been delivered to Rambus' customers for their system development. In addition, Rambus offers its customers engineering services for chip integration, package, board and system characterization and test in order to ensure success in the development and bring up of PCI Express-based chips and boards.
The Synopsys DesignWare PCI Express Endpoint Controller Core features configurability from one to eight channels, low gate count and timing closure to a .18-micron generic process. This architecture not only supports all of the features required for a PCI Express Endpoint solution, but it is also optimized for layout and performance and implements "enhanced" transaction layer features. For more information about the DesignWare PCI Express Endpoint Controller Core, visit http://www.designware.com.
About Rambus Inc.
Rambus is a leading provider of chip-to-chip interface products and services. The company's breakthrough technology and engineering expertise have helped leading chip and system companies to solve their challenging I/O problems and bring industry-leading products to market. Rambus' interface solutions can be found in numerous computing, consumer electronic and networking products. Additional information is available at www.rambus.com.
Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
Rambus is a registered trademark and RaSer is a trademark of Rambus Inc. PCI Express is a trademark of the Peripheral Component Interconnect Special Interest Group. Synopsys and DesignWare are registered trademarks of Synopsys, Inc.
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