Altera to Deliver DSP, FPGA, Hardcopy Presentations to MAPLD 2003

9/8/2003 - Altera will exhibit at the Sixth Annual Military and Aerospace Programmable Logic Device (MAPLD) International Conference. Altera representatives will deliver presentations on the leading programmable logic solutions for DSP applications, embedded systems, and no-risk, low-cost ASIC alternatives. The presentation titles are:

  • Digital Signal Processing with Altera® StratixTM FPGAs
  • When Worlds Collide: Embedded Systems in FPGAs
  • HardCopy: The Alternative to High Risk & High NRE ASICs

The Altera exhibition will include demonstrations of:

  • Accelerating DSP functions with Stratix FPGAs
  • The Nios® embedded processor – the industry’s most popular soft-core processor
  • Lowering component costs with HardCopyTM devices

Exhibition: September 9-11, 2003
Booth L14
Ronald Reagan Building and International Trade Center
1300 Pennsylvania Avenue, NW
Washington, DC 20004

For Additional Information: http://www.altera.com/education/events/northamerica/evt-mapld_2003.html

Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries.

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