Altera Implements 400-Mbps DDR Memory Interfaces with Web Seminar
8/26/2003 - Altera Corporation (NASDAQ: ALTR) is hosting a net seminar discussion about how designers can shorten their memory interface design cycles by using Altera’s StratixTM and Stratix GX FPGAs. Participants will learn how to easily implement 400 Mbps DDR memory interfaces in Altera’s Stratix and Stratix GX FPGAs.
Speakers
Greg Steinke, Director of Component Applications, Altera
When
Thursday, August 28, 2003
11:00 to 12:00 PM Pacific Time
All eligible persons who attend the seminar live and complete the feedback form will be entered in a drawing to win a Canon PowerShot A70 3.2-megapixel digital camera ($300.00 USD value).
Where
On-Line Net Seminar
For more information or to register for the event, please visit
www.altera.com/education/net_seminars/current/ns-ddr.html
Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries.
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