Faraday Adopts Mentor Graphics Calibre xRC for Parasitic Extraction

7/22/2003 - Mentor Graphics Corporation (Nasdaq: MENT) announced that Faraday Technology (TAIEX: 3035), the world's pre-eminent supplier of silicon-proven IP and a leading provider of system-on-a-chip (SoC) design services, has selected the Mentor Graphics® Calibre® xRC product as its transistor level and GDSII-based gate level parasitic extraction tool for SoC designs. Calibre xRCTM is part of the Calibre design-to-silicon solution.

"We chose the Calibre xRC product based on our need for accuracy and performance at the parasitic extraction phase of the design flow," said Dr. Jim Wang, director of design development division at Faraday. "The Calibre xRC tool allows us to run both GDSII based gate- and transistor-level extraction with the same tool. It also provides seamless upstream integration with the Calibre LVSTM tool to enable back-annotation of simulation results to the source schematic netlist. Its performance is 30 to 80 times faster than the previous version of the xCalibre tool on the parasitic extraction for our digital, analog, large memory block IP and full chip design."

Analog/mixed-signal SoC designs require a robust parasitic extraction tool that delivers accurate, mixed-level parasitic data for comprehensive and accurate analysis and simulation. The Calibre xRC tool offers AMS SoC designers a single parasitic extraction solution that is independent of design style or flow. For designers of analog or small blocks, The Calibre xRC product offers high accuracy and tight integration with popular layout environments. For designers of digital, large block or full-chip designs, the Calibre xRC tool offers performance driven by Calibre's hierarchical polygon processing engine. With this single parasitic extraction tool, design teams can now eliminate the costly maintenance of supporting multiple extraction tools.

"Increased complexity in circuit design is driving the need for more advanced analysis, which in turn, is driving the need for more accurate, intelligent parasitic data," said Joe Sawicki, vice president and general manager for the Mentor Graphics design-to-silicon division. "The integration between the Calibre LVS tool and the Calibre xRC product provides our customers the capability to get accurate parasitics for device-level, gate-level, and fully hierarchical circuit simulation."

The Calibre Design-to-Silicon Platform
In nanometer design, the handoff between IC layout and manufacturing has changed. In previous technologies, the handoff was a simple DRC/LVS check at tapeout. Now it is a multi-step process where the layout database is modified so the design can be manufactured. This presents a host of challenges. Issues arise concerning process effects, photolithography, data volumes and acceptable yield.

The integrated Calibre design-to-silicon platform, which includes physical verification, full-chip, transistor-level parasitic extraction, design for manufacturability (DFM), mask data preparation (MDP) and resolution enhancement technologies (RET), meets the challenges of every facet of the design-to-silicon transition with efficiency and accuracy.

In a continuing tradition of delivering advanced technology, the Calibre design-to-silicon platform of integrated tools is recognized as the industry standard worldwide to address the complexities of advanced IC design.

About Faraday Technology Corporation
Faraday Technology Corporation provides leading ASIC/SoC design services and production-proven IPs to customers ranging from system houses and IDMs to IC design houses. The company's broad portfolio of key IPs includes leading products such as RISC CPUs, 16/20/24-bit DSPs, USB 2.0, gigabit Ethernet, and Serial-ATA. Faraday's ASIC design services and IPs are widely used in PC peripherals, communication, and digital consumer products. With more than 470 employees and 2002 revenue of 96.2 million USD, Faraday is the largest fabless ASIC design service company in all Asia-Pacific. Headquartered in Hsinchu Taiwan, Faraday offers service and support branch offices around the world, including the U.S., Japan, Europe, and China. For more information on Faraday, please visit http://www.faraday.com.tw.

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Calibre and Mentor Graphics are registered trademarks, and Calibre xRC and Calibre LVS are trademarks, of Mentor Graphics Corporation.

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