Mentor Directs Infineon's Nanometer Design with TestKompress, Calibre

6/3/2003 - Mentor Graphics Corporation (Nasdaq: MENT) announced that Infineon Technologies AG has adopted the Mentor Calibre® design-to-silicon platform, and the embedded deterministic test (EDTTM) product, TestKompress®, as key enablers for Infineon's nanometer IC design strategy.

"Our collaboration with Infineon has been very rewarding," said Walden C. Rhines, Mentor Graphics chief executive officer and chairman of the board of directors. "It exemplifies all facets of true collaboration - mutual goals, clear communication and groundbreaking technical advancements. Infineon's choice of Calibre and TestKompress underscores Mentor's leadership position in critical aspects of next generation IC design flows."

TestKompress - Technology Overview
The TestKompress product uses the patented EDT technology to dramatically reduce the amount of test data required for today's complex ICs while preserving test quality, offering Infineon a significant reduction in test data volume with minimum impact to their designs. As a pioneer in Design-for-Test (DFT) and manufacturing test, Infineon played an integral role in the validation of the EDT technology and the TestKompress product, and has now adopted it for production IC test to maintain the highest test quality and reduce test costs.

Calibre Design-to-Silicon Platform - Technology Overview
As each new process node enables increased design size and complexity, it is essential that the design-to-silicon platform provides performance, efficiency and accuracy improvements to keep cycle times for transferring a design into manufacturing within the project window. The Calibre design-to-silicon platform has provided these consistent improvements enabling Infineon to meet the demanding schedule requirements for the 90 nanometer generation designs and smaller.

"Because of its best-in-class quality and performance we decided to adopt the Calibre design-to-silicon platform for physical verification and OPC in our 90 nm design flow," said Andreas von Schwerin, Director, Design Automation and Technology, Infineon Technologies AG. "Calibre has the most comprehensive roadmap for advanced resolution enhancement technologies in the industry providing a solid capability for Infineon to build upon for its advanced logic designs. In addition, Infineon expects significant benefits from Calibre's unique ability to retain hierarchy throughout the design flow."

"The Calibre OPC products were able to meet Infineon's Memory Products demanding requirements for accuracy and throughput for 110 and 90 nanometer memory designs," said Volker Kiefer, Senior Director, CAD and Software Development, Infineon Technologies AG. "Post-processing cycle times for highly customized DRAM layout have been reduced significantly for the 110 nm technology from several days per layer to one day per layer with the integrated Calibre design-to-silicon platform."

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site:

Information on Infineon Technologies is available at

Mentor Graphics, Calibre and TestKompress are registered trademarks and EDT is a trademark of Mentor Graphics Corporation.

Previous Page | News by Category | News Search

If you found this page useful, bookmark and share it on: