4/29/2003 - Xilinx Inc. (NASDAQ: XLNX) announced that it will join industry leaders Agilent, Cadence, IBM, Intel, Mentor and Texas Instruments in a series of serial connectivity panel discussions being held at Programmable World 2003 in locations worldwide. The panel session on “What's Required to Make High-Speed Serial Design a Reality?” will address the opportunities and challenges of designing next-generation multi-gigabit systems at speeds ranging from 1Gbps to 10Gbps and beyond.
A lively debate among expert serial I/O panelists will be moderated by Loring Wirbel, Editorial Director for Communications for the EE Times Network, on May 6, 2003 at 11 a.m. PST in San Jose, California with live simulcasts in Austin, Atlanta, Boston, Chicago, Columbia (Maryland), Dallas, Long Island, Longmont, Los Angeles, Ottawa, Phoenix, Raleigh, San Diego and Toronto. By attending this free 45-minute panel, system architects, designers and engineering managers will gain a better understanding of the cost and performance benefits for making the move from parallel to serial I/O, and methodologies for implementation and verification of next-generation, multi-gigabit systems.
“At Programmable World 2003, our panel of experts will tackle the tough issues facing today’s designers as they consider serial I/O schemes to address current and new bandwidth requirements,” said panel moderator Loring Wirbel of EE Times. “Although serial technology provides significant benefits over parallel I/O alternatives in reducing costs and simplifying PCB system design, engineers are challenged on multiple fronts when deploying this new technology. Among the topics we’ll cover are the need for flexible, cost-effective, general-purpose serial I/O silicon support; how to successfully address a complex array of emerging connectivity standards, and the need to support legacy parallel I/O systems when migrating to high-speed serial I/O.”
Panelists at the San Jose event will include: Siegfried Gross, Vice President, Digital Verification Solutions at Agilent; Donald Telian, Technologist at Cadence; Jean Calvignac, IBM Fellow at IBM Microelectronics; David Kohlmeier, Director of Engineering, High Speed Tools, System Design Division at Mentor Graphics; Bala Cadambi, PCI Express Initiative Manager at Intel; Ed Suder, Director of Engineering, High Performance Analog Division at Texas Instruments; and Marwan Hassoun, Senior Director of Engineering, Communication Technology Division at Xilinx.
As part of Programmable World 2003, panel discussions will also be held in Munich on May 15, and Tokyo on June 24. For additional information and to register for your free local Programmable World 2003 event, visit http://www.xilinx.com/pw2003.
About Programmable World 2003
Programmable World 2003 is a collaborative industry forum presented by IBM, Agilent, Cadence, and Xilinx, and sponsored by Mentor Graphics, Texas Instruments, Intel, and Wind River Systems, as well as, Synplicity, Synopsys, Nallatech, The MathWorks, Celoxica, and Altium, and 14 other sponsors. At this free industry event, engineers, system architects, and engineering manager will receive solutions oriented, technical sessions on the multi-faceted technologies and design methodologies revolutionizing today’s electronic systems design. Last year, over 8,000 engineers attended Programmable World 2002 – over 10,000 engineers are expected to participate in this year’s forum. For complete program information, visit http://www.xilinx.com/pw2003.
A broad array of technical sessions and real world design examples will be discussed, including:
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
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