Magma Announces Blast Create Front-End IC Design Flow

4/29/2003 - Magma introduces Blast Create, which is the next-generation front-end solution that enables logic designers to synthesize, visualize, evaluate and improve the quality of their RTL code, design constraints, testability requirements floorplan and placement.

Blast Create integrates:

Unlike conventional point-tool front-end flows, Blast Create does not rely on wireload models or inaccurate physical design data. With Blast Create’s high capacity, logic designers can confidently take RTL to gate-level netlist or Placed Gates for handoff to an in-house physical designer in a COT flow or a layout engineer at an ASIC vendor.

System architects and logic designers can build and analyze a flat, multimillion-gate SVP that accurately portrays their design in silicon so they can identify and fix problems early in the flow, ensuring a clean handoff between the RTL designer and the layout engineer and providing a predictable path to timing closure and accelerating the RTL-to-GDSII design flow.

"Blast Create's large capacity is 10 times that of our previous software, and the extremely fast turnaround time for synthesis increased our productivity significantly – we finished the design in less than half the time required by our previous standard flow," states Ron Gutfreund, Director of IP and Systems for Sycon Design Inc.

More Capacity, Higher Speed
Using Magma’s gain-based synthesis, Blast Create can synthesize several million gates at a time, provide 10x faster runtime and consistently better quality of results than conventional synthesis tools. Unlike conventional logic approaches, Blast Create’s synthesis does not depend on unreliable RTL mapping methods or attempt to predict chip area and timing using inaccurate physical data such as wire load models. It does not waste time performing unnecessary logic optimizations that get in the way of optimal physical implementation. Instead, as physical knowledge of the design progresses and accurate data about the wire lengths and capacitance becomes available, additional optimizations, such as cloning, logic restructuring and trimming, are used to produce fast, area-efficient designs.

Predictable RTL
Combining SI-aware physical synthesis with Magma’s gain-based synthesis enables fast physical implementation and analysis without sacrificing accuracy, and ensures delivery of a high-quality Placed Gates design to drive implementation directly. Blast Create generates an Early Silicon Performance (ESP) report that gauges the post-layout timing feasibility of the design based on the virtual prototype placement and routing. An Endpoint Gain Report identifies problematic paths – an endpoint with a low gain indicates a challenging delay requirement that may prevent the design from meeting timing. With the information in this report, the logic designer can address performance issues before handing off the design for implementation.

Clean Handoff
Blast Create integrates RTL and structural DFT checks, automatic repair and hierarchical scan insertion as part of the front-end flow, allowing test structures to be added in the same environment. It is important to include testability considerations very early in the design process to avoid netlist-to-RTL iterations. Additionally, Magma provides third-party interfaces for industry-leading DFT tools for Logic BIST, memory BIST and boundary scan insertion.

Open System
Blast Create, built on Magma’s unified data model, is an open system that provides a clean handoff to third-party and Magma back-end flows. ASIC vendors and their customers can define flexible signoff requirements and handoff models using Blast Create with their existing physical implementation flow. When used in conjunction with Blast Fusion, Blast Create offers additional benefits. Magma’s gain-based approach ensures that the decisions made during the prototyping, planning and placement phases are retained in the unified data model and guide the implementation. This allows the designer to hand off the design with additional confidence that timing closure will be achieved by Magma’s IC implementation solution. Key ASIC suppliers planning to support Blast Create in their flows include NEC Electronics America and Toshiba America Electronic Components.

Blast Create provides full support for industry-standard data formats such as .lib, SDC, LEF, DEF, PDEF, Verilog and VHDL, ensuring easy integration and interoperability with other EDA solutions.

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