4/15/2003 - Marking a major milestone in the semiconductor industry, Xilinx, Inc. (NASDAQ: XLNX) unveiled a new family of programmable chips expected to propel programmable logic devices further into high-volume, low-cost applications traditionally served by custom chips with fixed architectures.
With the new Spartan-3 family, Xilinx is leveraging both 90nm* and 300mm* advanced manufacturing technologies to achieve unprecedented density and price for field programmable gate arrays (FPGAs). By setting a new FPGA price-density standard, Xilinx will be able to target a $23 billion** total available market (TAM) and address new higher volume applications in the application-specific integrated circuit (ASIC) market.
Xilinx's investment in the world’s most advanced 90nm and 300mm chip-making process with dual fabrication partners IBM (NYSE:IBM) and UMC (NYSE: UMC) has enabled the company to achieve an 80 percent chip-size reduction compared to competitive products on 130nm technology. With prices starting at under $3.50***, Spartan-3 platform devices range from 50K to 5M system gates. Spartan-3 is the world’s lowest cost FPGA family, with pricing at under $20*** for a one-million-gate FPGA and under $100*** for a four-million-gate FPGA - a cost savings of up to 80 percent over competitive offerings. Already, Xilinx has shipped Spartan-3 devices to customers from both fabrication partners.
Industry Leaders Race to Advanced Process & Manufacturing Technology
Xilinx joins other leaders in their respective industries - industry giants such as IBM, Intel, and Texas Instruments - in spearheading adoption of 90nm and 300mm manufacturing technologies to further separate themselves from the competition by taking advantage of the greatest cost reductions in recent semiconductor history.
"The companies that get into 90nm production first will get a tremendous advantage in lower cost due to higher yields. The die shrink can also lead to much higher-performing devices," said Dan Hutcheson, president and CEO at VLSI Research Inc., San Jose. "Rivals who are late in 90nm process technology will fall behind and may not be able to catch up." According to public statements, Xilinx’s nearest competitor will not ship 90nm products until the first half of 2004, giving Xilinx a formidable lead in 90nm and its customers an added edge.
“With the announcement, Xilinx has completely changed the economic playing field for FPGAs, opening up a vast new market opportunity. Now, designers can afford to choose FPGAs over traditional custom devices for a broader set of cost-sensitive, high volume applications – and get to market faster,” said Wim Roelandts, president and CEO of Xilinx. “As traditional ASIC and ASSP design starts continue to decline, we expect that FPGA design starts using Spartan-3 will ultimately fuel higher growth for PLD makers."
Spartan-3 FPGAs: ASIC Replacement for High Volume Applications
Engineers developing products for the price-sensitive, high-volume electronics market have historically used custom chips with fixed architectures such as ASICs because of their performance and cost advantages. With Spartan-3, Xilinx has dramatically narrowed the price-performance gap between programmable and fixed logic to drive FPGA adoption further into higher volume applications and hasten the decline of ASIC design. Among the many applications Xilinx can now address low cost routers, storage servers, residential gateways, medical and industrial imaging, video-on-demand services, and consumer entertainment (LCD TVs, HDTV, DVD-RW, etc.), to name a few. In addition, by making programmable technology more affordable and accessible, new types of functionality and features will now be available in a wider range of end products.
Richard Wawrzyniak, senior analyst for ASICs and SoCs (systems-on-a-chip) at Semico Research Corporation agrees. "With today's announcement of low-cost FPGAs, Xilinx is positioned to initiate a new wave of innovative solutions aimed at empowering a whole range of applications that previously could not use FPGAs. The design alternatives open to engineers have been expanded by the new Spartan 3 family of FPGAs due to their high functionality, off-the-shelf availability and low cost structure; and clear advantages over custom ASICs when the major concern is to reduce costs and get to market faster."
Spartan-3 Platform: Built on Foundation of Customer Success
The new 90nm Spartan-3 platform has been built upon the proven success of Spartan Series products, which have been broadly adopted in high-volume, high-growth consumer applications – the most difficult high-volume market to penetrate and one historically dominated by ASICs. Since its introduction in 1998, Xilinx has shipped more than 50 million Spartan Series devices that have been designed into innovative products ranging from set-top-boxes and plasma display televisions to automotive telematics.
"Xilinx Spartan Series FPGAs provided a cost-effective, programmable alternative to ASICs," said Richard Beckert, hardware design lead at Microsoft Corp. "We chose the Spartan series FPGA because it provided us with a time-to-market advantage, the flexibility to make last minute changes, as well as impressive product support from Xilinx."
Pricing and Availability
The new Spartan-3 family consists of eight devices at prices starting below $3.50. First customer shipments of new Spartan XC3S50 (50K system gates for under $3.50), and XC3S1000 (1 million system gates for under $20) began last month. Additional family members will begin shipping in the summer 2003. The entire Spartan-3 family will be available in volume production in early 2004 from distributors worldwide, or direct from Xilinx at www.xilinx.com/spartan.
Customers interested in learning more about the new Spartan-3 FPGA can attend Programmable World 2003. For complete forum program and registration information, visit www.xilinx.com/pw2003.
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic and programmable system solutions. Additional information about Xilinx is available at www.xilinx.com.
* 90nm measures the space between the lines of circuitry on a chip and is less than 1/1,000th the width of a human hair. 300mm wafers describe the diameter of the silicon disk used to produce chips. The larger the surface, the more chips that can be produced per wafer.)
** Source: iSuppli 1/2003; Dataquest 2/2003
*** Pricing in quantities of 250,000 in volume production in 2004.
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