4/10/2003 - Reducing board space by 70 percent, Texas Instruments announced a new low phase noise clock synthesizer with multiplying, dividing, and jitter cleaning features that optimizes timing performance for board designers. This new integrated chip reduces board costs and the need for numerous discrete components.
The CDC7005 synchronizes a voltage controlled crystal oscillator (VCXO) with a reference clock and integrates a low noise phase frequency detector, precision charge pump, programmable dividers, operational amplifier, and 1:5 differential clock buffer with dividing options. Ideal for communication, instrumentation, and industrial applications, the device's low phase noise performance is beneficial for many signal chain devices including A/D-D/A converters, serializers, ASICs and digital signal processors (DSPs) requiring precise reference clocking.
The CDC7005 accepts a 3.5 megahertz (MHz) to 180 MHz reference clock and requires a VCXO clock from the range of 10 MHz to 800 MHz to synchronize. By selecting the appropriate VCXO, the device can output up to 800 MHz by multiplying or dividing the reference clock and selecting from a combination of individually programmable divide ratios.
The device offers five low-skew, differential outputs. The CDC7005 offers the flexibility to choose the optimal PLL loop bandwidth even below 10 Hz, providing capability to clean jitter from the incoming reference clock. An integrated operational amplifier may be used for the purpose of optimizing this loop bandwidth with an active filter design. In addition, output phase can programmably be delayed or advanced without the need for external components.
Availability, Packaging and Pricing
TI´s CDC7005 clock synchronizer is available now from TI and its authorized distributors. The device is packaged in a small and thermal optimized 64-pin BGA package. Planned pricing in quantities of 1,000 is $13.80.
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