4/3/2003 - Altera Corporation (NASDAQ: ALTR) announced a series of global seminars, titled Code:DSP System Architecture Solutions, focusing on system design and implementation methodologies for mixed hardware- and software-based signal processing systems. Targeting Altera's high-performance StratixTM and low-cost CycloneTM device families, these free, full-day seminars will demonstrate how system architects can leverage the performance and time-to-market advantages of Altera FPGAs.
The ever-increasing computational requirements of digital signal processing-based products are fueling the need for system architecture solutions that eliminate processing bottlenecks. "The capacity and performance of Altera FPGAs are making them core components across all applications that include extensive control or digital signal processing functions," said Craig Lytle, vice president of Altera's intellectual property business unit. "The Code:DSP System Architecture Solutions seminars will reveal innovative architectural approaches, such as FPGA co-processors that integrate tightly into existing software methodologies."
The Code:DSP System Architecture Solutions seminars will take place throughout North America beginning April 29 running through June 5. Dates and locations for seminars outside North America will be announced at a later date. For more information on the dates and locations of Altera's North American Code:DSP System Architecture Solutions seminars, or to register for a seminar near you, visit www.altera.com/codedsp.
For more information about the Stratix device family, visit www.altera.com/stratix.
For more information about the Cyclone device family, visit www.altera.com/cyclone.
About Altera's Code:DSP System Architecture Solutions
Altera's Code:DSP System Architecture Solutions feature intellectual property (IP), tools, and devices that off-load performance-hungry DSP algorithms to software-controlled FPGA-based co-processors. Co-processors can include user-defined or off-the-shelf IP from the more than 60 DSP IP cores available on the Altera IP MegaStoreTM web site.
Altera's algorithm IP portfolio provides pre-designed, pre-optimized, flexible algorithm components that can be parameterized and integrated directly into proprietary system architectures, allowing designers to consolidate various functions into a single system-on-a-programmable-chip (SOPC) solution.
User-defined FPGA co-processors can be developed quickly with DSP Builder, Altera's dataflow architecture development tool based on The MathWorks' Matlab and Simulink tools. Once the co-processor architecture is captured, it can be implemented in an Altera FPGA or exported to Altera's SOPC Builder system development tool for further integration into the overall system architecture.
The SOPC Builder software unifies the design efforts of the system, hardware, and software architects by enabling system-level specification and the automatic assembly of complex system architectures based on building block processing components.
Altera Corporation (NASDAQ: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.
Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries.
Previous Page | News by Category | News Search
If you found this page useful, bookmark and share it on: