Altera Hosts Implementing Reconfigurable DSP Designs in FPGAs Workshop

3/31/2003 - Altera Corp. (NASDAQ: ALTR) will host a workshop on "Implementing Reconfigurable DSP Designs in FPGAs" at the Global Signal Processing Expo (GSPx) next week in Dallas, Texas.

System designers attending the workshop will learn design methodologies to implement signal processing systems in FPGAs with Altera's system-on-a-programmable-chip (SOPC) solutions. The workshop will enable designers to develop custom DSP system architectures for their target applications, increasing system performance and lowering overall costs.

In addition, Altera will present the following papers during the conference:

  • "High-Performance, Low-Cost FPGA Correlator for Wide-Band CDMA and Other Wireless Applications," on Wednesday, April 2.
  • "Design Methodology for DSP Hardware Acceleration," on Tuesday, April 1.
  • "Soft Multipliers for DSP Applications," on Tuesday, April 1.

For more information on the workshop or presentations, visit the Altera booth #102.

Workshop: Monday, March 31 from 1:00 p.m. to 5 p.m.
Global Signal Processing Expo: March 31 - April 3, 2003

Hotel Intercontinental
15201 Dallas Parkway
Addison TX, 75001

For additional information, or to register, visit:
http://www.altera.com/education/events/northamerica/evt-gsp2003.html

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