3/17/2003 - Cadence Design Systems, Inc. (NYSE: CDN) and Semiconductor Manufacturing International Corporation (SMIC) announced that SMIC has qualified one of its first-generation reference flows. This flow incorporates the Cadence® EncounterTM digital IC design platform to address nanometer design challenges such as complex hierarchical designs and timing and signal integrity (SI) sign-off. This reference flow was developed using SMIC's 0.18ï€ micron process technology and validated with designs from customers. Cadence is one of the first electronic design companies to launch an RTL-to-GDSII reference flow with SMIC.
"SMIC, the largest foundry and ASIC design services provider in China, has many customers who need to migrate to designs at 0.18 micron and below," said James Sung, vice president of marketing and sales at SMIC. "This means they are facing increasingly difficult design challenges. The SMIC reference flow, fueled by advanced digital IC design technology from Cadence, along with SMIC's process kit, will ensure the highest levels of quality and productivity for our customers."
The SMIC-Cadence Reference Flow 1.0 is a complete RTL-to-GDSII flow. It consists of all necessary design steps, including logic synthesis, simulation, silicon virtual prototyping and physical implementation. This reference flow deploys the Cadence Encounter wires-first continuous-convergence methodology. It allows designers to quickly generate a virtual prototype to identify timing, SI and routing congestion issues early in the design cycle. This enables SMIC's customers to conduct more feasibility studies to determine the best chip scenarios in terms of die size and performance.
In the implementation stage, this flow provides a comprehensive platform for designers to drive RTL-to-GDSII with emphasis on fast, accurate and automatic timing and SI closure. It addresses hierarchical block partitioning, physical timing optimization, 3-D RC extraction, IR drop, and crosstalk glitch and delay analysis. This flow enables designers to refine the virtual prototype and proceed in a systematic, predictable way toward a quality tapeout.
"We are happy to be the electronic design company to partner with SMIC and launch one of its first reference flows," said Mathew Chan, corporate vice president and president of Cadence Asia Pacific. "I believe our engagement with SMIC puts in place another vital link in our customers' design chain, ensuring a manufacturing aware design chain from idea to silicon. It also highlights the growing number of foundries and design houses in China that rely on the Cadence digital IC design flow."
SMIC is the first pure-play advanced IC foundry in China to achieve volume production for 8-inch wafers at 0.25 micron and finer line technologies. Established in April 2000, SMIC is a Cayman Islands company based in Shanghai. The foundry provides customers with a full range of services that include: design services, mask manufacturing, wafer fabrication as well as testing capabilities. For more information, please visit www.smics.com.
Cadence is the world's largest supplier of electronic design technologies and services. Leading computer, networking, wireless, and consumer electronics companies use the company's solutions to design electronic systems and semiconductors down to nanometer scale. With approximately 5,300 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at www.cadence.com.
Previous Page | News by Category | News Search
If you found this page useful, bookmark and share it on: