Cadence Leads Seminars, Demo Products at D.A.T.E 2003

3/5/2003 - Cadence Design Systems, Inc. (NYSE: CDN) will announce new products and alliances at the Design, Automation & Test in Europe (D.A.T.E) Conference, which runs from March 4 to 6 in Munich. These announcements, along with demonstrations in the Cadence booth and Cadence technologist and executive presentations, support the Cadence mission of enabling customer success from design to volume for electronic products.

Cadence President and CEO Ray Bingham will host a press conference on March 4 at 3 p.m. in Hall 1-C1 to shed more light on the recently announced Cadence IncisiveTM verification platform, the first single-kernel verification platform for nanometer-scale designs that can compress overall verification time by up to 50 percent. Cadence also will announce an important new alliance targeting design chain optimization for its customers.

Aki Fujimura, Cadence vice president and general manager of the Cadence design for manufacturing (DFM) business unit, will participate in a design-for-manufacturing panel session sponsored by the X Initiative. The panel, "Square Pegs and Round Holes: Bridging the Design-to-Manufacturing Gap," will take place in the Exhibition Theatre in Hall C1 at 6:20 pm.

Cadence will lead interactive seminars and exhibit leading-edge EDA technologies designed to enable customer success:

Verification Demonstrations
A Complete Environment for Integrated Functional Verification
Speed up Your Simulation Using Hardware-based Acceleration
System Verification Using In-circuit Emulation

Encounter Platform Demonstrations
Large Digital Nanometer Scale Design from RTL to GDSII with SoC EncounterTM
ASIC Virtual Prototyping Using First Encounter® Ultra
Prototype-Optimize-Place-and-Route - It's Easy with Nano Encounter
Signal Integrity Closure in Nanometer Design

Custom IC Demonstrations
Substrate Noise Analysis of RF/Analogue/Mixed-Signal ICs
Accelerate Your Analogue Layout - Synthesize Your Layout in Hours, Not Days. Analogue Physical Synthesis with NeoCell
UltraSim Reliability Analysis (Modeling, Simulation, Measurement)
SPICE Modeling Environment
Assura Physical Verification and Extraction Suite

SPECCTRAQuest® Power Integrity Module
Front-to-Back PCB Design Flow with Constraint Management
Advanced Packaging Engineer Advanced Packaging Designer

OpenAccess Seminar
OpenAccess Industry-Standard Unified Database & Open-Community Source Program

Silicon/Package/Board Seminar
A New Design Methodology for Differential Signaling

Incisive Launch Seminar
New Cadence Incisive verification platform presentation and demonstration

Verification Round Table
Addressing Verification Challenges. Join Cadence and your industry colleagues as we look at the issues impacting your design verification challenges

Interoperability Round Table
Round table discussion on the topic of interoperability

Papers Being Presented
Cadence technologists will make 12 technical presentations throughout the week on a variety of topics. Please check the show schedule for times and topics.

Cadence Booth
Booth No. H34, Hall C1

About Cadence
Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,300 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services is available at

Cadence, the Cadence logo, First Encounter, and SPECCTRAQuest are registered trademarks and SoC Encounter and Incisive are trademarks of Cadence Design Systems, Inc.

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