2/25/2003 - Altera Corp. (NASDAQ: ALTR) will present "Design Guidelines for Optimal Results in High-Density FPGAs" at the 2003 Design and Verification Conference (DVCon), formerly HDLCon. This session will review FPGA design practices that result in improved timing performance, logic utilization, and system reliability. Design engineers will learn how to minimize problems when retargeting a design to different speed grades or device architectures.
The presentation is part of DVCon's Session Four on "Hardware Languages Trends and Techniques."
When: Tuesday, February 25 from 8:30 a.m. to 9 a.m.
Design and Verification Conference: February 24 - 26, 2003
Where: Santa Clara Room
2050 Gateway Place
San Jose, Calif. 95110
For additional information, visit: www.dvcon.org
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