12/22/2003 - Cypress Semiconductor Corporation (NYSE:CY) announced that its Timing Technology Division will host a series of one-hour web seminars concentrating on key issues involved in designing with high-speed clocks. Each seminar is available on demand and may be viewed at any time by accessing the corresponding URL.
Presented by Cypress timing technology experts, the seminars will cover a myriad of clock related topics including: architecture basics; power supply bypass and layout considerations for minimal jitter; system considerations, including cascading PLLs, EMI, and probing high-speed clocks; and programmable clocks.
Timing device parameters, especially phase-locked loop-based clock buffers, have become ubiquitous in high-frequency complex systems. However, how data sheets specify device performance hasn’t been improved in the last ten years. Seminar #1, entitled “Evaluating Clock Performance by Its Total Timing Budget Window”, presents a more precise measurement of how a clock buffer impacts system-timing budget and the major environmental factors affecting that parameter. To view seminar #1 go to http://www.netseminar.com/nss/showSeminar?sem_num=642.
Seminar #2, entitled “Minimizing Total Timing Budget Impact”, examines the detailed considerations a designer must make to minimize the Total Timing Budget impact with a clock distribution buffer by using common clock tree examples. To view seminar #2 go to http://www.netseminar.com/nss/showSeminar?sem_num=650.
Lastly, Seminar #3, entitled “Total Timing Budget Over a Clock Tree: Reading Between the Datasheets” discusses considerations and examples for designing with cascading phase-locked loops, tracking skew, jitter transference, and accumulated jitter. To view seminar #3 go to http://www.netseminar.com/nss/showSeminar?sem_num=655.
Cypress Semiconductor Corporation (NYSE: CY) is Connecting From Last Mile to First Mile™ with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects™ using wireless, wireline, digital, and optical transmission standards, including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM. Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and reconfigurable mixed-signal arrays. More information about Cypress is accessible online at www.cypress.com.
Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. “Connectivity From Last Mile to First Mile” and “Cypress Connects” are trademarks of Cypress.
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