Sun Continues Commitment to 0-In's Assertion-Based Verification Suite

12/19/2003 - 0-In Design Automation, the Assertion-Based Verification Company, announced that Sun Microsystems, Inc. has renewed its corporate license for 0-In's Assertion-Based Verification (ABV) Suite and expanded the license to include all 0-In product offerings. This expansion comes as the direct result of the ABV Suite's success at improving the verification process on numerous projects throughout Sun.

"Since we originally licensed the 0-In products in 2000, they have seen wide adoption throughout Sun's design and verification community," said Shrenik Mehta, Sun's director of front-end technologies - ASICs and processors. "The 0-In tools have been used to help verify both ASIC designs and UltraSPARC® microprocessor designs, resulting in significantly faster time-to-market. We are pleased at the progress that 0-In has made in evolving and expanding their product line. We have found their new static products valuable for verifying synchronization across clock domain crossings and mutual exclusion for one-hot multiplexers."

Improper synchronization of signals that cross from one clock domain into another can be detected by 0-In Checklist, which automatically finds common RTL coding errors quickly and easily with no simulation required. Clock domain crossing (CDC) errors are very hard to find with simulation since clock relationships remain fixed. By using static netlist-analysis technology, 0-In Checklist can detect CDC problems that would occur in the manufactured chip when independent clocks shift around arbitrarily.

Many microprocessor designs implement each one-hot multiplexer with transistors connecting separate input signals to a common output signal. It is critical that two pass transistors are never enabled at the same time, since the resulting current flow could damage the chip. Formal analysis is the only effective way to verify that the control lines for the multiplexer pass transistors are always mutually exclusive. 0-In Confirm uses static formal verification to find deep RTL corner-case design bugs that are missed by all other verification methods, including one-hot multiplexer conflicts, and to prove that no such bugs exist.

"By renewing their license for 0-In products and expanding it to include our latest products, Sun will be able to expand their deployment of our tools to include 0-In Checklist and 0-In Confirm, two static verification products announced earlier this year," said 0-In President and CEO Steve White. "Sun also has licensed our complete suite of CheckerWare protocol monitors for use in both simulation and formal verification and continues their broad-based usage of our 0-In Check and 0-In Search dynamic verification products."

About 0-In
0-In Design Automation, Inc. (pronounced "zero-in") develops and supports functional verification products that help verify multi-million gate application-specific integrated circuit (ASIC) and system-on-chip (SoC) designs. The company delivers a comprehensive assertion-based verification (ABV) solution built on industry standards that provides value throughout the design and verification cycle - from the block level to the chip and system levels. Twelve of the 15 largest electronics companies have adopted 0-In tools and methodologies in their integrated circuit (IC) design verification flows. 0-In was founded in 1996 and is based in San Jose, Calif. For more information, see

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