ARC Rolls Out Development Tool Suite to Simplify System Development

12/2/2003 - ARC International (LSE: ARK), a world leader in user-customizable processors, peripheral IP, real-time operating system and development tools for embedded system design, unveiled its Development Tool Suite for the ARC 600 – a powerful collection of tools to facilitate software and hardware development as well as co-simulation. The ARC&3153; 600 Development Tool Suite includes the ARChitect 2, MetaDeveloper, a Cycle Accurate Simulator, and MetaSimTM. Together these tools simplify the design of ARC processor-based SoCs by dramatically reducing the complexity of RTL integration, software development, and system-level modeling.

“The ARC 600 Development Tool Suite was designed to meet the complex needs of our SoC customers,” said Mike Gulett, president and CEO of ARC International. “These customers told us they wanted software tools that were not only more robust and easy to use, but that existed within an environment that allows them to comprehensively explore a design from start to finish. Our new Development Tool Suite gives designers the ability to navigate and perform design tradeoffs thereby minimizing design risk and development time.”

ARChitect 2
ARChitect 2 is a sophisticated EDA tool for configuring and building system-level designs that integrate ARC IP. Typical options include the choice of a microprocessor core and instruction set, DSP instructions and extensions, interrupts, and a robust assortment of pre-verified peripherals such as USB, USB/OTG, UARTS, Ethernet MAC and timers. The tool provides a GUI-based interface to easily define component parameters as well as “drag-and-drop” component capabilities to automate system-level SoC design. This automation obviates manual intervention that is often required to integrate SoC components and errors that may result as a part of the process. Customer-defined IP may also be integrated into ARChitect 2 through the Extension Interface Automation (EIA) Wizard, which can also be used to instantiate new ARC 600 extensions. By automatically updating essential system information such as projected silicon speed and area while a system is being configured, ARChitect 2 enables early and quick exploration of a multitude of system options. Once satisfied that a system meets requirements, ARChitect 2 generates the RTL, synthesis scripts, and test bench for the defined system.

For software developers, the ARCTM 600 Development Tool Suite offers several options. The MetaDeveloper Bundle from ARC includes MetaWare C/C++ compiler, SeeCode Debugger, IDE, Instruction Set Simulator (ISS), and integrated Profiler. ARC’s MetaWare C/C++ employs state of the art compilation techniques such as branch profiling, aggressive instruction scheduling, and cross-module optimizations to enable targeting of both performance and small code size. Also available are the MetaDeveloper MQX RTOS tool kit, which adds fully scalable RTOS support, and MetaDeveloper Builder, which adds full Internet protocol stack support. These bundles add essential tools that enable a developer to quickly and graphically prototype and implement RTOS- and Internet-based applications. Software development is also made easy with a GUI-based Integrated Profiler that enables developers to quickly identify ways to optimize software performance or identify hot spot candidates for migration to extension instructions using ARChitect 2.

Cycle Accurate Simulator
As an alternative to the ARC 600 ISS, the ARC 600 Cycle Accurate Simulator (CAS) provides greater processor simulation accuracy while maintaining high simulation speed. The ARC 600 CAS models essential hardware mechanisms such as cache misses and pipeline stalls, thus enabling a developer to accurately measure an application’s software performance without silicon. The ARC 600 CAS is also C-callable enabling system designers to instantiate the processor as a component to their own system model. Through the same process, a system designer can instantiate multiple ARC 600 CAS models to simulate complex multi-processor systems.

Targeted at firmware and hardware developers, MetaSim provides co-simulation capabilities from within the familiar SeeCode Debugger environment to deliver high performance simulation needed for the develop and test of software, peripherals, and complete systems in advance of silicon. MetaSim utilizes the ARC 600 ISS to model the processor component of a system while interfacing with industry standard RTL simulators to model other hardware components. By partitioning the system in this way, system designers are able to leverage the fast simulation times of the ARC 600 ISS and the sophisticated debugging capabilities of both hardware and software development environments. In a typical system, MetaSim is one hundred to one thousand times faster than off-the-shelf RTL based simulation methods. MetaSim also supports simulation of complex multi-processor systems.

For more intensive hardware and system development, ARC offers the ARCangel, a powerful development and prototyping platform. Utilizing Xilinx FPGA technology, different ARC 600 configurations can be downloaded and modeled as a part of a complex hardware system. The ARCangel is compatible with all of ARC development tools, allowing engineers another path to quickly develop and optimize application software prior to silicon.

Pricing and Availability
The Development Tool Suite for the ARC 600 runs on Windows, Linux, and Unix operating systems. ARChitect 2 is included in the licensing fee for an ARC processor. MetaSim is available at $15,000.The MetaDeveloper Toolkit and ARC 600 CAS are individually priced starting at $5,495. The ARCangel development system is available at $15,000.

About ARC
ARC International is a world leader in embedded silicon and software SoC IP. ARC’s solutions minimize risk for customers developing a wide range next-generation wireless, networking, industrial control, storage and consumer electronics products. ARC introduced the industry’s first user-customizable 32-bit RISC/DSP processor core and the industry's first USB Hi-Speed On-The-Go IP. ARC’s turnkey embedded solutions, combining the processor core with a real-time operating system, development tools and peripheral hardware and software IP, enable developers to optimise the design and performance of their applications. By providing designers with a single source for all major embedded silicon and software IP building blocks, ARC dramatically reduces their number of suppliers, thereby reducing cost, reducing risk and reducing time-to-market.

ARC International employs approximately 180 people in research and development, sales and marketing offices across North America, Europe and Asia. Full details of the company’s locations and other information are available on the company’s website, ARC International is listed on the London Stock Exchange as ARC International plc (LSE: ARK).

ARC, the ARC logo, ARCtangent, ARCangel, ARCompact, ARChitect, ARCform, CASSEIA, High C, High C/C++, SeeCode, MetaDeveloper, MetaWare, Precise Solution, Precise/BlazeNet, Precise/EDS, Precise/MFS, Precise/MQX, Precise/MQXsim, Precise/RTCS, Precise/RTCSsim are trademarks of ARC International.

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