Teradiant Tapes Out Two Multi-million Gates with Magma Blast Fusion

10/22/2003 - Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design solutions, announced that Teradiant Networks Inc. has taped out two multi-million-gate, 300 MHz, 0.13-micron hierarchical designs using Blast Fusion®, Blast Noise® and Blast PlanTM. With Magma's integrated approach to hierarchical and physical design and signal and power integrity, Teradiant was able to design full-duplex, multi-service packet engine and traffic manager chips for 10 Gbps to 40 Gbps performance. Magma's open data model allowed Teradiant designers to implement complex buffering and routing schemes and IO ring structures. Blast Noise addressed signal integrity issues throughout the flow, eliminating time-consuming and costly iterations.

"Without Magma's integrated system we could not have taped out these designs within the limited time and resources available," said Satchit Jain, CEO of Teradiant. "The open unified data model, high-quality timing analysis engine, integrated placement and routing engines, automatic signal integrity analysis, avoidance and adjustment capabilities enabled our engineers to quickly address design issues and deliver very high-quality results."

Magma delivered on Teradiant's most important design flow requirements - quality of results (QoR), run-time, high capacity optimization, an open and accessible data model, and ease of adoption. Further, Teradiant was able to achieve its design goals of performance, area, and manufacturability.

"Teradiant has a highly capable team of savvy engineers who quickly figured out how to leverage Magma's unified data model to maximize quality of results without sacrificing design cycle time," said Nitin Deo, vice president of product marketing at Magma. "They used an over-the-block buffering and routing scheme, complex I/O ring structures and incremental corrective action during full chip integration. These are great examples of what you can do with Magma's open data model."

Open Data Model Architecture Delivers Better QoR and Allows Design Flow Flexibility
Magma's integrated RTL-to-GDSII system is based on a unified data model and single database. The various functional elements of the system - such as the synthesis, place-and-route and analysis engines - all use the same data structure. The database contains all logical, timing, physical and electrical information about the design and is resident in core memory during execution. This unique system architecture provides all functional elements with direct access to the database and allows them to operate concurrently and to evaluate the overall effect of each design decision. As a result, the system can fully optimize the design for timing, area, signal integrity, and power and manufacturability, maximizing quality of results and reducing turnaround time.

In traditional flows, each point tool has a unique database and data model or structure. Data is shared between the tools using cumbersome and time-consuming file transfers and APIs. Point-tool flows that claim to have a single database actually have an additional database that acts as a repository for all the design data. The tools in these flows operate in a serial manner, not concurrently, so they can't evaluate the overall effect of each design decision. As a result, many iterations are required to optimize the design.

The Magma data model supports all industry-standard formats and is fully accessible through Tcl. This provides designers with a seamless flow that can include third-party tools - if necessary - and allows designers to use custom Tcl scripts.

About Teradiant Networks
Teradiant Networks develops and markets semiconductors that enable networking system manufacturers to build scalable switch and router platforms for next-generation networks. Its 8000 Series and 9000 Series families are the first traffic manager devices to be available in single-chip solutions for 10 Gbps to 40 Gbps performance. Teradiant semiconductors are optimized for a range of applications in core, edge, metro and enterprise networks. For more information, visit www.teradiant.com or call 408-519-1700.

About Magma Design Automation
Magma software is used to design fast, multimillion-gate integrated circuits, providing "The Fastest Path from RTL to Silicon"TM, enabling chip designers to reduce the time required to produce complex ICs. Magma's products for prototyping, synthesis, and place & route provide a single executable for RTL-to-GDSII chip design. The company's Blast CreateTM, Blast Fusion®, Blast Fusion APXTM, Blast Noise® Blast PlanTM and Blast RailTM products utilize Magma's patented FixedTiming® methodology and single data model architecture to reduce the timing-closure iterations often required between the logic and physical processes in conventional IC design flows. Magma also provides the PALACETM and ArchEvaluatorTM advanced physical synthesis and architecture development tools for programmable logic devices (PLDs). The company's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.

Magma, Blast Fusion, Blast Noise and FixedTiming are registered trademarks, and ArchEvaluator, Blast Create, Blast Fusion APX, Blast Plan, Blast Rail, PALACE and "The Fastest Path from RTL to Silicon" are trademarks of Magma Design Automation.

Previous Page | News by Category | News Search

If you found this page useful, bookmark and share it on: