JEDEC SSTA Selects Cypress’ Trung Tran to Memory Buffer Task Group

10/6/2003 - Cypress Semiconductor Corporation (NYSE: CY), a world leader in timing-technology solutions, announced that Trung Tran has been appointed chairman of the JEDEC Solid State Technology Association’s (SSTA) next-generation memory buffer task group newly formed under the JC-42.5 Memory Modules Committee. The sub-group is responsible for defining the specification of the DDRIII; fully-buffered registered dual inline memory module (DIMM) logic components. Mr. Tran has also recently been nominated to the JEDEC board of directors.

The DDRIII DRAM registered module specification, like DDR and DDRII before it will include the necessary logic components to manage the signals from the chipset to the module; each component will be developed in parallel. The sub-group, led by Mr.Tran, will be instrumental in the buffer specification portion.

“As a leader in memory IC technology, Cypress has always played a key role in memory standards specifications,” said Trung Tran, senior applications manager for Cypress's Timing Technology Division. “It’s exciting to be chairing the effort of defining next-generation solutions for high-performance memory sub-systems. These standards will provide a roadmap for designers and assure compatibility for manufacturers.”

Mr. Tran joined Cypress Semiconductor in 2000 and is currently responsible for product definition of Cypress’s frequency timing generators and timing distribution products. Prior to joining Cypress Mr. Tran worked for Hewlett-Packard as a hardware engineer responsible for HP’s first line of 1U/2U servers.

In addition to graduating top in his class in electrical engineering at the United States Air Force Academy, Mr. Tran also received multiple commendations for technical innovation. During his tenure in the USAF, Mr. Tran served as the project lead on the National Security Agency’s first family of reprogrammable crypto chips.

The JEDEC Solid State Technology Association (once known as the Joint Electron Device Engineering Council), is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. Almost 1800 representatives appointed by some 250 JEDEC member companies work together in nearly 50 JEDEC committees to create these standards plus additional engineering and technical publications. JEDEC seeks to promote the universal acceptance of these publications and standards, which are intended to meet the needs of every segment of the industry and its customers. All JEDEC standards are available free online at

About Cypress
Cypress Semiconductor Corporation (NYSE: CY) is Connecting From Last Mile to First MileTM with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress ConnectsTM using wireless, wireline, digital, and optical transmission standards, including USB, Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM. Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and reconfigurable mixed-signal arrays. More information about Cypress is accessible online at

Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. “Connecting From Last Mile to First Mile” and “Cypress Connects” are trademarks of Cypress.

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