1/28/2003 - Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design solutions, announced it has been issued a new patent by the United States Patent and Trademark Office (USPTO) for its method for storing multiple levels of design data for common use at different stages of integrated circuit design. The patent, #6,505,328, covers the technology behind Magma's single data model, used throughout a fully integrated IC design flow, from logic design through physical design.
The Magma patent describes the basis for Magma's unified data model. Magma's truly integrated RTL-to-GDSII design flow enabled by the unified data model provides a system for automated logic circuit design that is capable of storing and utilizing multiple levels of design data simultaneously. This not only eliminates the need for translation of circuit descriptions between different design tools but also enables the simultaneous operations of placement, optimization, timing and routing. Simultaneous operations on a net-by-net or cell-by-cell basis enable signal integrity and design closure for timing, noise, electromigration and power.
"The database approach used in conventional design flows does not address problems related to simultaneous operation of tools," said Venk Shukla, Magma's senior vice president, marketing & business development. "Databases operate under the premise that one application loads data from the database, operates on it and, when done, writes it back to the database for the next tool to run. These repeated input and output operations take much time and are inefficient. A single data model, on the other hand, allows all applications to simultaneously read and analyze the effect of one application on the other. Magma, with our unified data model, is the only EDA vendor that can provide this faster, more efficient approach."
While most of the EDA industry continues to rely on databases, Magma is the only vendor that applies a single data model across the logical and physical domains, with algorithms that operate directly on the data model. Magma's approach to IC design flow, based on the concepts embodied in this newly issued patent, has several advantages over conventional design flows. Historically, design flows have consisted of disparate point tools that perform different functions - such as logic synthesis, automatic placement or static timing - during the long chain of steps that make up a design flow. Conventionally, these point tools were built separately, using a variety of internal data representations. Chaining them into a useful flow required a complicated database with extensive data conversion. The patent details how Magma's innovative unified data model eliminates the slow internal data conversion by running each tool step directly on a common representation. Unlike systems not based on a unified data model, the Magma system has its timing, power and noise analysis engines built in as integrated parts of the unified data model. The resulting tight and efficient integration is key in achieving fast design closure on large multi-million-gate chips, as made possible by Magma's recently announced Blast Fusion APX TM.
"This patent forms the basis for the innovative approach to IC design that Magma pioneered," Shukla continued. "It describes the best method known for implementing the truly integrated, RTL-to-GDSII design flow that's needed for the complex designs chipmakers face today. The success our customers have had, and the speed and capacity improvements offered in our new Blast Fusion APX, show clearly that the unified data model has inherent advantages over traditional design flows."
Magma also holds patents on the timing closure methodology (FixedTimingTM); for a method of designing a constraint-driven IC layout; for sub-grid detailed routing; on a generalized theory of logical effort for lookup table-based delay models and parallel cells; and for automated design of parallel drive standard cells. The patent office has also allowed, and will therefore be issuing to Magma, a patent for estimating the parasitic capacitance of wires based on congestion information.
About Magma Design Automation
Magma software is used to design fast, multimillion-gate integrated circuits, providing "The Fastest Path from RTL to Silicon"TM to enable chip designers to reduce the time required to produce complex ICs. Magma's products for prototyping, synthesis, and place & route provide a single executable for RTL-to-GDSII chip design. The company's Blast Fusion™, Blast Fusion APX™, Blast PlanTM, Blast Noise® and Blast RTLTM products utilize Magma's proprietary FixedTiming® methodology and single data model architecture to reduce the timing-closure iterations often required between the logic and physical processes in conventional IC design flows.
Magma maintains headquarters in Cupertino, Calif., as well as sales and support facilities in Silicon Valley, Los Angeles, Orange County and San Diego, Calif.; Boston, Mass.; Durham, N.C.; Laurys Station, Pa.; Austin and Dallas, Texas; Newcastle, Wash.; and in Canada, China, France, Germany, India, Israel, Japan, Korea, the Netherlands, Taiwan and the United Kingdom. The company's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
Magma, Blast Noise and FixedTiming are registered trademarks, and Blast Fusion, Blast Fusion APX, Blast Plan and "The Fastest Path from RTL to Silicon" are trademarks of Magma Design Automation.
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