Cadence Extends Leadership in Parasitic Extraction With Agere Systems Technology

1/7/2003 - Cadence Design Systems, Inc. (NYSE:CDN), the world's leading supplier of electronic design products and services, and Agere Systems (NYSE: AGR.A, AGR.B) announced the latest enhancement of the Cadence(R) Assura(TM) RCX platform for high-accuracy layout parasitic extraction. Cadence has incorporated Agere Systems' Nebula technology, licensed exclusively to Cadence, into the Assura RCX product line. This provides the industry's first completely integrated, fast field solver capability in a device-level extractor.

The combined technology provides chip designers with fast, highly accurate parasitic extraction for selected nets or blocks. By integrating Nebula into the Cadence industry-leading analog design environment, microchip designers will have a fast and highly accurate tool for design of high performance analog and mixed-signal integrated circuits (ICs).

The Assura Parasitic Extractor (RCX) is a comprehensive full-chip, three-dimensional, device-level solution that enables analysis of chip electrical performance with high accuracy parasitic extraction from the physical layout. With Assura RCX-FS, designers can quickly access field solver accuracies within the Cadence analog design environment. RCX-FS is the first tool to provide a practical design approach to integrating a field solver into a full chip, extracted netlist. This capability enhances first silicon success without extending design cycle time.

Agere's Nebula high accuracy field solver is based on a sophisticated algorithm enhanced at Agere to meet the company's critical need for highly accurate, highly sensitive, critically timed high-speed circuits. With Assura RCX-FS as an integral part of its design flow, Agere achieves the necessary device-level parasitic resistance and capacitance extraction.

Today's complex process technologies require extremely accurate parasitic modeling for timing and noise sensitive sections of the chip, such as the low voltage bitline signal development path in memory designs. At Agere, high-density memory compiler leaf cells for high-speed circuits are extracted with Nebula. This provides the accuracy so critical in enabling subsequent higher-level simulation.

"Our Nebula technology has resulted in significantly improved modeling results," said Kathy Krisch, Agere's director of modeling and design kits. "Our previous extraction tool underestimated the parasitic capacitance due to via effects. With Nebula, we experienced a 30 percent improvement in accuracy, allowing us to retime the circuit appropriately and prevent silicon failure. Having Nebula technology available in the Assura platform will allow Agere to more quickly and efficiently extract and simulate critical parasitics in our high-performance circuits."

When using Assura RCX-FS with Assura RCX, designers can perform a one-pass parasitic extraction of larger designs. Assura RCX-FS is used for critical net extraction and Assura RCX to extract parasitics on the rest of the chip. The results from both tools are automatically combined into a merged netlist for full-chip simulation. With Assura RCX and Assura RCX-FS, designers can minimize silicon re-spin and increase design productivity.

"We are happy to have partnered with Agere to deliver such an advanced extraction solution to customers. The combination of Nebula-based Assura RCX-FS and Assura RCX form a vital piece of the analog/mixed-signal design flow for the highest possible level of accuracy and performance in parasitic extraction," said Aki Fujimura, corporate vice president and general manager of the Cadence design for manufacturing (DFM) business unit. "Cadence is the only vendor able to offer such a seamlessly integrated combination of full-chip and 3-D field solver technology. As we move from 130 to 90 nanometer designs and beyond, solutions such as the Assura product family increase in importance. Agere's selection of the Assura platform further ratifies the Cadence position as best-in-class provider for analog/mixed-signal design flows."

The latest enhancement of Assura RCX in collaboration with Agere builds on earlier achievements that have resulted in other integrated device manufacturers (IDMs) validating the speed and performance of Assura RCX as the best in the industry. Assura RCX-FS is currently released as an option to Assura RCX for customer testing and evaluation.

The Nebula Technology
Nebula is a high-accuracy field solver developed at Agere Systems by David E. Long and Sharad Kapur. It is based on a sophisticated version of a numerical algorithm called the Fast Multipole Method (FMM). The FMM was invented at Yale for numerical analysis and first applied to capacitance and IC problems at MIT. The algorithm was refined and enhanced at Lucent Technologies Bell Labs, and subsequently at Agere, to be applicable to large-scale capacitance problems encountered in modern ICs.

"We initially developed and deployed Nebula for internal use," said Krisch. "However, it was recognized that in order to fully meet the needs of Agere's design community, the Nebula technology needed to be integrated with a highly-capable extraction tool. Agere chose to align with Assura RCX from Cadence because of the high-accuracy and speed it provided in its pattern matching solution."

Nebula is significantly faster than field solvers based on other currently used algorithms such as, finite elements techniques or random walk methods. With Nebula, there is a smooth tradeoff between speed and accuracy. This allows designers to achieve a very accurate solution at a very high speed, or the most highly accurate solution at a slower speed, depending on specific needs and resource constraints. In addition, Nebula is the only available tool that accurately handles features especially critical in nanometer design such as, via effects, trapezoidal wires, conformal dielectrics, air gaps and process bias.

About Agere Systems
Agere Systems research and development has its roots in the invention of the transistor and many of the semiconductor industry's most significant technological advances. The company has more than 6,000 patents related to semiconductor process technology, device structure and design methodology.

Agere Systems is a premier provider of advanced integrated circuit solutions that access, move and store network information. Agere's access portfolio enables seamless network access and Internet connectivity through its industry-leading WiFi/802.11 solutions for wireless LANs and computing applications, as well as its GPRS offering for data-capable cellular phones. The company also provides custom and standard multi-service networking solutions, such as broadband Ethernet-over-SONET/SDH components and wireless infrastructure chips, to move information across metro, access and enterprise networks. Agere is the market leader in providing integrated circuits such as read-channel chips, preamplifiers and system-on-a-chip solutions for high-density storage applications. Agere's customers include the leading PC manufacturers, wireless terminal providers, network equipment suppliers and hard-disk drive providers. More information about Agere Systems is available from its Web site at

About Cadence
Cadence is the largest supplier of electronic design technologies, methodology services, and design services. Cadence solutions are used to accelerate and manage the design of semiconductors, computer systems, networking and telecommunications equipment, consumer electronics, and a variety of other electronics-based products. With approximately 5,200 employees and 2002 revenues of approximately $1.3 billion, Cadence has sales offices, design centers, and research facilities around the world. The company is headquartered in San Jose, Calif., and traded on the New York Stock Exchange under the symbol CDN. More information about the company, its products and services are available at

Cadence and the Cadence logo are registered trademarks and Assura is a trademark of Cadence Design Systems, Inc.

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