9/18/2002 - Magma® Design Automation, a provider of chip design solutions, announced that Paxonet Communications, a leading telecommunications intellectual property (IP) and Silicon provider, has successfully completed a 133 MHz, 0.13-micron optical networking integrated circuit (IC) using Blast FusionTM and Blast NoiseTM. Paxonet's "Chopper" device, which performs classification, policing and performance monitoring of packets / cells at rates of 2.5Gbps (OC-48), contains 2 million gates and 1.4Mbits of RAM. The high capacity of Blast Fusion allowed Paxonet to implement the large design using a flat design methodology, and using Linux systems helped achieve accelerated run times. With Magma's powerful and integrated approach to implementation and signal integrity avoidance, Paxonet was able to take the design from netlist to GDSII in just 10 weeks, meeting all their design and schedule requirements.
In an effort to maximize the performance and minimize the turnaround time for their high-density, high-speed designs, Paxonet Communications decided to establish a customer owned tooling (COT) flow. Paxonet Communications selected Magma software as the basis for its new COT flow because it provides a comprehensive IC design and implementation solution in a single executable. This integrated system made adoption of the new flow faster, easier and more cost effective than patching together a set point tools.
"Prior to this design, we utilized ASIC vendor flows for physical implementation," said Dinesh Mahale, director of engineering at Paxonet Communications. "Despite the high gate counts, high-speeds, and our designers unfamiliarity with Magma system's we were able to tape out the chip with ease and efficiency using Magma software."
"Paxonet offers ICs with unprecedented levels of integration, scalability and flexibility," said Rajeev Madhavan, CEO and chairman of Magma Design Automation. "We're very pleased that this exciting company has selected Magma for its next-generation designs and design flow."
An Integrated Approach to Implementation and Signal Integrity
With the size and complexity of their designs and the deep submicron processes used by Paxonet, achieving timing closure and eliminating signal integrity violations is a challenge. Magma's Blast Chip RTL-to-GDSII and Blast Fusion netlist-to-GDSII implementation systems provide the solution. Magma's systems are based on the patent-pending FixedTimingTM methodology. This approach enables Magma's systems to predict circuit speeds prior to detailed physical design. The systems then use a series of design refinements during physical design to achieve a final timing that is very close to the predicted circuit speed. With predictable timing results, iterations can be eliminated and time-to-market can be significantly improved.
In addition to providing advanced synthesis and place & route technology, Magma offers Blast Noise. This optional addition to the Magma flow uses an automatic analyze, avoid and adjust methodology to address crosstalk noise, crosstalk delay and signal electromigration (EM) problems during the design implementation phase. Signal integrity violations are avoided by reordering the track routes based on overlapping victim and aggressor net timing windows. Wide space routing, buffering, sizing and shielding are also used to eliminate these problems. In this way, Magma's analysis and implementation engines work concurrently with the FixedTiming methodology to eliminate signal integrity problems, while at the same time maintaining optimal timing.
"In previous designs, signal integrity violations could not be identified until after layout, and repairing them was a very time-consuming and iterative process. Fixing a crosstalk problem could introduce other problems in the design, and there was no easy way to tell when that was happening," Mahale said. "With Blast Fusion and Blast Noise, we could run reports throughout implementation and verify that signal integrity violations were being automatically eliminated during the flow without affecting timing or introducing other problems."
Fully Accessible Unified Data Model Ensures Optimal Performance
Only Magma's system can address signal integrity during the implementation flow because only Magma's systems are based on a single, unified data model architecture. This architecture is a key enabler of Magma's FixedTiming methodology, as well as the system's ability to deliver automated signal integrity detection and correction. Magma's single data model is fully accessible through Tcl scripts, contains all of the logical and physical information about the design and is resident in core memory during execution. In Magma's system, the various functional elements such as the implementation engines for synthesis, placement and routing, and the analysis software for timing, delay extraction and signal integrity, all operate directly on the single data model without relying on file interfaces or APIs. This tight integration allows more accurate analysis of the design, and enables the system to make rapid tradeoff decisions during the design process to optimize for better chip performance, area, and power.
"Magma's unified data model architecture made the system easy to use. There was no need to take the design out of the Magma environment into other tools," Mahale said. "With access to complete design data, we were able to effectively optimize the design to meet our complex interface timing requirements and perform ECOs while monitoring how those changes impacted other aspects of the design's performance."
Paxonet Communications, Inc., designs, develops and markets silicon solutions for interworking metro networking technologies to SONET. Paxonet Communications offers the MetroConnect line of integrated circuits and the CoreEl line of specialized IP cores focused on the metro market. By offering a full range of interoperable ICs and IP cores, Paxonet enables customers to offer highly differentiated, low cost solutions with a quicker time to market. The company is privately held and employs 130 people.
About Magma Design Automation
Magma software is used to design fast, multimillion-gate integrated circuits, enabling chip designers to reduce the time required to produce complex ICs. Magma's products for prototyping, synthesis, and place & route provide a single executable for RTL-to-GDSII chip design. The company's Blast FusionTM, Blast Chip®, Blast PlanTM, Blast Noise® and Blast PrototypeTM products utilize Magma's proprietary FixedTiming® methodology and single data model architecture to reduce the timing-closure iterations often required between the logic and physical processes in conventional IC design flows. Magma's Diamond SITM also leverages the single data model architecture to provide an integrated, standalone platform for post-layout, sign-off-quality signal integrity verification.
Magma maintains headquarters in Cupertino, Calif., as well as sales and support facilities in Silicon Valley, Los Angeles, Orange County and San Diego, Calif.; Boston, Mass.; Durham, N.C.; Austin and Dallas, Texas; Newcastle, Wash.; and in Canada, Germany, Israel, Japan, Korea, The Netherlands, Taiwan and the United Kingdom. The company's stock trades on Nasdaq under the ticker symbol LAVA.
Magma, Blast Chip, Blast Noise and FixedTiming are registered trademarks and Blast Fusion, Blast Plan and Diamond SI are trademarks of Magma Design Automation.
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