Sequence, UMC Team on First Silicon Correlation of Inductance Modeling

9/4/2002 - Sequence Design and UMC, a world leading semiconductor foundry, announced that the two companies have teamed to complete the first ever silicon correlation of an interconnect self inductance parasitic modeler. With this technology, UMC customers producing technology at 150 nanometers and below can be assured that high-speed analog and digital designs will have fewer failures due to interconnect issues. The Columbus R, C and self-inductance interconnect modeler libraries for UMC processes are available for download now on UMC's website.

Tuned specifically for high-frequency designers, Columbus-RF features industry-leading modeling capabilities for RC and inductance in RF circuits. The tool's tight integration with the industry-standard Cadence Analog Design Environment and physical verification tools ensures ease of use and ease of adoption.

UMC and Sequence developed a methodology to ensure accuracy of Sequence's Columbus technology. Tests were performed on a total of 30 die at 150 nanometers with plans for similar tests at 130 and 90 nanometers, each containing 25 unique interconnect self inductance structures. The S-parameters were then measured and converted to inductance values and correlated with the extracted interconnect self-inductance parasitic values. In all cases, the extracted inductances were within 10 percent of silicon-measured values.

The project sprang from a concern both companies had about the effects of inductance on timing and signal integrity due to interconnect issues arising from new, advanced processes, according to Vic Kulkarni, Sequence president and CEO.

"UMC continues to evaluate technologies that make our silicon the best in the industry. Inductance is an important issue that cannot be overlooked as it is an essential physical effect that needs to be modeled for accurate high-frequency RF high-speed digital designs," said Tai Sheng Feng, vice president and division director of Design Support for UMC. "Our customers often ask for this capability, and partnering with Sequence provides them with reliable, proven technology."

"Our continuing collaboration with UMC will provide a greater number of IC design houses with the interconnect modeling technology they desire," Kulkarni said. "Columbus-RF is the leading EDA tool for extracting interconnect inductance parasitics, and is field-proven with multiple companies. Our work with UMC validates that our inductance technology is a winner."

About Columbus-RF
Columbus-RF is part of Sequence's ExtractionStage, a suite of high-performance EDA tools tuned for complex multi-million-gate SoCs (systems-on-a-chip) and analog/mixed-signal design. ExtractionStage is the only suite of interconnect parasitic tools extracting high-accuracy resistance (R), coupled-capacitance (C), and inductance (L) values across a wide range of design styles.

The product has experienced significant sales growth in the past two years, gaining more than 20 customers since its release. IBM includes Columbus-RF in its SiGe design kits, and Qualcomm, Valence, and LeCroy are among a growing list of customers using the product for wireless design.

Columbus-RF was recently chosen by the readers of Wireless Systems Design as the best wireless design tool for 2002.

About UMC (
UMC (NYSE: UMC, TSE: 2303) is a world-leading semiconductor foundry that manufactures advanced process ICs for applications spanning every major sector of the semiconductor industry. UMC delivers the cutting-edge foundry technologies that enable sophisticated system-on-chip (SOC) designs, including 0.13um copper/low k, embedded DRAM, and mixed signal/RFCMOS. In addition, UMC is a leader in 300mm manufacturing with three strategically located 300mm fabs to serve our global customer base: Fab 12A in Taiwan, UMCi in Singapore (pilot production Q2 2003), and AU Pte. Ltd., a joint venture facility with AMD that is also located in Singapore (production in 2005). UMC employs over 8,500 people worldwide and has offices in Taiwan, Japan, Singapore, Europe, and the United States.

About Sequence (
Sequence Design, Inc., the SoC Design Closure CompanySM, enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to fabrication. Sequence's physical design software and solutions give its more than 100 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of sub-180 nanometer designs.

Sequence has worldwide development and field service operations. The company was formed through the merger of Sente, Inc., Sapphire Design Automation, Inc. and Frequency Technology. Sequence is privately held. Sequence is a member of Cadence Design Systems' ConnectionsTM and Mentor Graphics' Open DoorTM partnership programs.

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