SandCraft Announces 800MHz MIPS Processor Built on UMC's 0.13um Technology

8/26/2002 - The demand for faster, more sophisticated processing in the control and forwarding planes of the networking and communications markets is driving demand for high performance embedded CPUs. SandCraft, a leader in the design of high-performance MIPS® processors, announced that sampling has begun for its SR71010B. The SR71010B is being manufactured on the 0.13 micron MPU process at UMC, a world leading semiconductor foundry. With its high-frequency capability, large caches and advanced pipeline architecture, the SR71010B provides the highest performance of any embedded MIPS processor on the market today. This scalable architecture will migrate to GHz rates and beyond.

The SR71010B complements SandCraft's earlier announced SR71010A and SR71040A. The SR71010B leverages UMC's 0.13um, 8-layer copper/ low-k (k=2.7) technology with the foundry's embedded 6T SRAM option to achieve clock frequencies up to 800Mhz. The SR71010B is pin-compatible with current MIPS microprocessors of lesser performance, which permits easy adoption. By relying on a verified, stable, proven architecture, SandCraft reduces the risk of development for its customers, letting them rapidly offer new product enhancements, and improve system performance, while preserving their current hardware and software platforms.

"The performance of high-end embedded applications, such as control plane management of routers and switches or control of sophisticated imaging processes, are often constrained by the performance of the CPU that manages the system," said Paul Vroomen Chief Executive Officer of SandCraft. "By adding the 800MHz SR71010B to our existing portfolio of high-performance, value-sensitive microprocessors, SandCraft is able to cover a full range of applications for 64-bit MIPS CPUs."

The SR71010B series core is derived from the company's existing 64-bit, dual-issue superscalar SR1010A 600MHz core. The single-core based architecture uses SandCraft's MIPS64 Instruction Set and incorporates a deeply staged multi-pipelined design with dynamic branch prediction and low power consumption. The SR71010B is the third in a series of advanced processors developed to target the high-end server and communications market segments.

"We are delighted to be working with SandCraft on the SR71010B MIPS processor," said Fu Tai Liou, chief officer of worldwide sales and marketing for UMC. "UMC and SandCraft shared similar success with the timely development of the 0.15um 600MHz and 450MHz speed grade versions of the SR71010A, which started production shipments in Q1 2002. We are pleased that the synergy between the two companies paid off again with the rapid release of the 800MHz SR71010B in 0.13um silicon."

Pricing and Availability
Prototype samples of the SR71010B are available now to qualified customers. Production shipments are planned to commence in Q4 2002. The SR71010B is priced at $150.00 in quantities of 10KU. The device is manufactured on a high performance 0.13um copper process at UMC, Taiwan, and utilizes a 304pin EBGA package.

About the SR71010B
SandCraft has carefully crafted the SR71010B to achieve the maximum speed and efficiency demanded by high performance embedded applications, such as networking and imaging applications. This MIPS64-class processor can issue and execute up to six instructions per clock cycle, into a pipeline that uses out-of-order issue and dispatch, and in-order retirement. Its highly efficient, two-way superscalar architecture incorporates dual instruction fetch, dual dispatch and dual commit, to maintain a throughput of two instructions per cycle.

The processor has a nine-stage superscalar pipeline for high clock frequency, with a pipeline-bypass architecture optimized for minimizing instruction dependent stalls. Its sophisticated, dynamic branch prediction capability sustains performance with 97 percent accuracy, by keeping the pipeline fully utilized and minimizing branch mispredictions. The implementation methodology of the CPU allows it to be rapidly migrated to more advanced processes and therefore higher clock frequencies, without necessitating changes to the pipeline architecture. This ensures that a customer's investment in developing with this architecture will be protected as process technology advances.

The SR71010B optimizes system performance and reduces system cost with integrated on-chip memory, including 32 KB each of primary instruction and primary data cache; 512 KB of unified secondary cache; and tertiary cache control, including on-chip tertiary cache tags that can support up to 16 MB of external tertiary cache using commodity SRAMs. The 4-way set associative primary caches and 8-way set associative secondary and tertiary caches provide capacity and rapid access to critical data and instructions. The processor also supports cache line locking and prefetching for improved performance.

The SR71010Bs' high performance 64-bit system interface is fully compatible with existing implementations of the MIPS address and data interface, known as SysAD, operating at an interface bus frequency of up to 133 MHz, with split transactions and out-of-order return.

The SR71010B is a fully static design with dynamic energy-saving features that provide very low power dissipation for its high level of performance. For example, at clock speeds of 600 MHz, it typically consumes less than three and half watts. At 800 MHz, it will consume less than five watts.

The chip's high performance floating-point unit is fully MIPS64-compliant and is decoupled from the integer pipeline for autonomous integer and floating-point operations.

The SR71010B support toolkit includes a comprehensive set of simulation tools and development boards. The SR71010B leverages standard third-party software tools, such as compilers from Red Hat, and embedded operating systems from Wind River, to give developers programming flexibility along with rapid time-to-market. The SR71010B toolkit includes a development board with Ethernet ports and logic analyzer connection ports for convenient code development and debugging; a full set of development tools, including a C complier from Red Hat optimized specifically for this CPU architecture; linkers, loaders and libraries; and a full set of documentation. This toolkit is available now to qualified customers.

About SandCraft (
SandCraft develops and markets advanced superscalar microprocessors for high-performance networking equipment, laser printers and high end consumer applications, based on the MIPS Instruction Set Architecture. These processors are primarily targeted for use in communications applications such as control plane processing in core and edge switches and routers, high end enterprise LAN switches and routers, storage area networks (SAN) and remote access systems such as DSL aggregrators and wireless head-ends. Office automation applications such as color, black and white laser printers and raster image processing also utilize processors of this class.

"Engines for the Digital Age" is a trademark of SandCraft, Inc. "MIPS32" and "MIPS64" are trademarks of MIPS Technologies Inc.

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