8/1/2002 - Synopsys released the latest version of its premier physical synthesis tool, Physical CompilerTM 2002.05. This release of Physical Compiler runs twice as fast as the previous release and also improves quality of results (QoR) by an average of six percent. These results were achieved through significant improvements to the core algorithms unique to Physical Compiler.
"We have been long-term users of Physical Compiler because of its unmatched quality of results," said Richard Boisjoly, project director ASIC Development, Matrox Graphics Inc. "With the latest version of Physical Compiler, we were able to achieve up to 20 percent improvement in circuit performance out of the box for most of our blocks. Not only has Synopsys executed on its commitment to QoR with Physical Compiler, it has also substantially improved run time. What used to take us multiple days can now be completed in an overnight run."
According to Maynard Hammond, ASIC principal engineer, Subscriber Networks Sector, Scientific Atlanta Inc., "Physical Compiler has long been our preferred solution for its quality of results, both timing and congestion. With the latest release, we have also been impressed by the dramatically shortened run times. It used to take us on an average two to three days run time to achieve these results, now we can get them the very next day. This is a tremendous boost to our productivity."
This release of Physical Compiler also comes with a new and improved graphical user interface (GUI) that offers faster run times for basic operations such as design loading, congestion display, airline display and schematic display.
"Over the past couple of years, Physical Compiler with Apollo/Astro has emerged as the tool of choice for power users," said Sanjiv Kaul, senior vice president and general manager, IC Implementation business unit, Synopsys. "With this release of Physical Compiler, our customers are already seeing the benefits offered by dramatically improved turnaround times and quality of results. Going forward, the Physical Compiler/Astro flow will improve even further."
About Physical Synthesis
With dozens of leading companies standardizing on Synopsys' Physical Synthesis, Synopsys is setting the design standard for physical synthesis worldwide. Synopsys' Physical Synthesis has been instrumental in the design of leading edge products in diverse applications such as 3G wireless, networking, processor/DSP, consumer electronics, computing and graphics. Synopsys' Physical Synthesis tools are easily integrated into customers' existing infrastructure and design flow, accelerating time-to-results with the lowest cost of adoption.
About Synopsys (www.synopsys.com)
Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, Calif., creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Synopsys is a registered trademark of Synopsys Inc. Physical Compiler is a trademark of Synopsys Inc.
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