7/1/2002 - Actel Corporation (NASDAQ: ACTL) today unveiled its AX architecture, a new field-programmable gate array (FPGA) technology specifically developed to the meet the extreme-performance, high-capacity requirements of designers of leading-edge, next-generation communication systems. AX was crafted with two key objectives in mind - to eliminate the performance bottlenecks and expensive work-arounds that exist when using traditional FPGAs pushing the performance envelope; and to provide a scalable, logic-integration platform for future Actel product generations.
In optimizing the AX solution to address the performance bottleneck, Actel created an architecture that exceeds 500 MHz internal core performance, the industry's highest, and will enable devices based on this new platform to eclipse the speed and logic utilization of any products currently on the market. Indeed, with Axcelerator, the first product family based on this AX architecture also announced today (see related press release titled "Actel Unveils Axcelerator, World's Fastest FPGA"), Actel has set a new standard for system-level performance. To achieve its objectives, Actel integrated a number of new logic, routing, clock management, I/O and embedded features and functionality into the high-performance AX architecture.
"Over the course of its history, Actel has seen FPGA technology evolve to meet the needs of higher and higher speed communications applications. Actel's new AX architecture represents a new rung on the technology ladder for FPGA architectures," said John East, president and CEO at Actel. "Users of Actel's FPGAs based on AX now have the performance boost they have been waiting for. In fact, it is becoming more and more evident that for applications in which speed is critical, Actel is poised to take the leadership position."
Key Features of the AX Architecture
The AX architecture features several key advancements. Included among these are new high-speed, FIFOs for data buffering, an intelligent clock and clock-phase management system, and a scalable, tile-based, high-utilization logic structure.
Embedded FIFO Controller: The embedded FIFO control unit contains metastability immune control circuitry that supports high-performance communications design without utilizing general device resources.
Fully Fracturable SuperCluster: The AX architecture is fully fracturable, meaning that if one or more of the logic modules in a SuperCluster are used by a particular signal path, the other logic modules are still available for use by other paths. As a result, the fully fracturable SuperCluster allows high logic module utilization.
Embedded 64-bit PerPin FIFO: The addition of an embedded 64-bit PerPin FIFO enables easy interfacing with off-chip resources on different clock domains.
Flexible Clock Structure: Available equally across the chip, the AX architecture includes eight PLLs and eight global clocks, which eliminates the need for clock floorplanning and eases design migration.
The Platform for Next-Generation Solutions
High-speed applications require a general-purpose FPGA architecture capable of handling high data rates coming on to the chip. With internal core performance over 500 MHz, more than 20 percent faster than that of the competition, the AX architecture is a suitable platform on which Actel can develop general-purpose and BridgeFPGA solutions for next-generation, high-speed communications applications.
Following the initial five Axcelerator family members, Actel plans to deliver additional derivatives over the next 18 months. Further capitalizing on the high-speed internal core performance of the AX architecture, the first family specifically optimized for bridging applications is expected to sample by the end of 2002.
The statements that "Actel plans to deliver additional derivatives over the next 18 months" and that "the first family specifically optimized for bridging applications is expected to sample by the end of 2002" are forward-looking statements made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Actual events and results may differ materially from those expressed or forecast in the forward-looking statements due to the Risk Factors set forth at the end of Part I of Actel's Annual Report on Form 10-K for the year ended January 6, 2002, including those discussed under the following headings: Dependence on Customized Manufacturing Processes; Dependence on Independent Software and Hardware Developers; and Technological Change and Dependence on New Product Development.
Actel Corporation is a supplier of innovative programmable logic solutions, including field-programmable gate arrays (FPGAs) based on antifuse and flash technologies, high-performance intellectual property (IP) cores, software development tools and design services targeted for the high-speed communications, application-specific integrated circuit (ASIC) replacement and radiation-tolerant markets. Founded in 1985, Actel employs approximately 500 people worldwide. The Company is traded on the Nasdaq National Market under the symbol ACTL and is headquartered at 955 East Arques Avenue, Sunnyvale, Calif., 94086-4533. Telephone: 888-99-ACTEL (992-2835). Internet: http://www.actel.com
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