6/3/2002 - Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex integrated chip (IC) design, today introduced VCS™ 7.0, pioneering the first comprehensive Smart Verification solution to address increasing system-on-chip (SoC) verification challenges. VCS 7.0 incorporates advanced higher-abstraction verification technologies in a single open platform to enable faster verification with greater confidence. New technologies in VCS include native code generation support for OpenVera™ assertions (OVA); native code generation support for OpenVera testbench constructs, called "VeraLite"; native support for CycleC, a RTL C++ performance technology; and a new native coverage metric, Observed Coverage.
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