Synopsys Physical Compiler Introduces RTL Performance Prototyping

5/27/2002 - Synopsys, Inc. (Nasdaq: SNPS), the technology leader for complex integrated circuit (IC) design, today introduced an RTL Performance Prototyping (RPP) flow utilizing Physical Compilerô, targeted toward IP providers and IP integrators. Adoption of the new flow enables IP providers to quickly characterize their soft IP against a complete set of end technologies, configurations and floorplans, and also dramatically reduces the time and effort required to integrate this IP into complex SoC designs.

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