5/28/2002 - Cypress Semiconductor Corporation (NYSE: CY) announced today that it will host a one-hour web seminar entitled "Evaluating Clock Performance by Its Total Timing Budget (TTB) Window." This seminar presents a more precise measurement of how a clock buffer impacts system timing budget and the major environmental factors affecting that parameter. Timing device parameters, especially phase-locked-loop-based clock buffers, have become ubiquitous in high frequency complex systems. However, how data sheets specify device performance have not seen any improvement over the last 10 years, according to Mark Sherwood, Senior Marketing Manager of Cypress Semiconductor's Timing Technology Division. Sherwood will host the seminar, which will include discussion of what TTB is, how and why it is being added to datasheets, as well as what additional benefits are gained from this effort.
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