Cadence Announces Samsung Electronics Co., Ltd. Sign-Off Endorsement Of BuildGates And PKS Static Timing Analysis In ASIC Design Flows

4/29/2002 - Cadence Design Systems, Inc. (NYSE:CDN) today announced that Samsung Electronics Co., Ltd. (SEC) has issued a sign-off endorsement for the static timing analysis (STA) technology embedded within BuildGates® synthesis and Cadence® Physically Knowledgeable Synthesis (PKS) software for application specific integrated circuit (ASIC) design flows. SEC now includes BuildGates synthesis and PKS libraries for 0.13-micron and 0.18-micron technologies in its STD150 and STD130 design kits.

Previous Page | News by Category | News Search

If you found this page useful, bookmark and share it on: