3/5/2002 - CoWare(TM), Inc., has enhanced its CoWare N2C(TM) design system with second-generation Interface Synthesis(TM) capabilities, enabling designers to develop optimal architectures for the latest complex SoC (system-on-chip) designs. These capabilities solve one of the most difficult problems in today's designs—finding the bus architecture that gives the best tradeoff of high performance and low power. This design decision has a huge impact on the end product, but the latest generation of SoC buses allow so many possibilities that designers can only take their best guess at the optimal architecture. CoWare N2C removes the guesswork in making these tradeoffs and implementing the designs. This capability has been proven in production designs using the AMBA® 2.0 on-chip interconnect and STMicroelectronic's STBus.
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