12/19/2002 - The X Initiative, a semiconductor supply-chain consortium, announced that Nikon Corporation has joined the X Initiative. X Initiative members collaborated with Nikon to validate a new design-to-wafer supply chain at 130 nm for the X Architecture, a breakthrough chip architecture based on the pervasive use of diagonal chip wiring. Nikon employed its NSR-S205C Step-and-Repeat Exposure System, using a KrF excimer laser, to process X Architecture wafers and validated the results met their manufacturing criteria.
Nikon’s experiment will help accelerate the adoption of the X Architecture as a production-worthy approach to the pervasive use of diagonal interconnect, which reduces total on-chip wiring by more than 20 percent and via count by more than 30 percent—delivering simultaneous improvements in chip performance, power consumption and overall cost. The results also underscore the value of collaboration throughout the semiconductor supply chain to address the challenges of subwavelength design.
Nikon’s results complete the design-to-manufacturing collaboration by X Initiative members, aimed at providing the first fully tested design-to-wafer supply chain for the X Architecture at 130 nm. This extends the design-to-wafer supply chain—previously established by X Initiative members at 180 nm—to a new advanced process node, and marks the completion of the next key milestone in the X Initiative roadmap.
“We don’t see any barriers to manufacturing X Architecture chips with our exposure systems,” said Toshikazu Umatate, General Manager of 1st Development Dept. of IC Equipment Division of Precision Equipment Company at Nikon Corporation. “We found the collaboration amongst the X Initiative members to be very beneficial to us in understanding new design-to-manufacturing requirements.”
Nikon’s X Initiative-sponsored experiments employed X Architecture design data from Cadence Design Systems, optical proximity correction (OPC) from Numerical Technologies, and photomasks produced by DuPont Photomasks.
“We’re pleased to see the excellent technical progress of the X Initiative, especially here in Japan,” stated Aki Fujimura, X Initiative Steering Group member and corporate vice president and general manager of design for manufacturing at Cadence. “The X Initiative has become a leading forum for design-to-manufacturing collaboration in the industry and this latest result from Nikon at 130 nm marks yet another milestone on the road to commercial success.”
More information about the X Initiative and Nikon’s results is available at www.xinitiative.org, along with extensive information on the X Architecture.
About the X Architecture
The X Architecture, the first production-worthy approach to the pervasive use of diagonal interconnect, reduces the total interconnect, or wiring, on a chip by more than 20 percent and via-counts by more than 30 percent, resulting in simultaneous improvements in chip performance, power and cost. For the past 20 years, chip design has been primarily based on the de facto industry standard “Manhattan” architecture, named for its right-angle interconnects resembling a city-street grid. The X Architecture rotates the primary direction of the interconnect in the fourth and fifth metal layers by 45 degrees from a Manhattan architecture. The new architecture maintains compatibility with existing cell libraries, memory cells, compilers and IP cores by preserving the Manhattan geometry of metal layers one through three.
About the X Initiative
The X Initiative, a group of leading companies from throughout the semiconductor industry, is chartered with accelerating the availability and fabrication of the X Architecture, a revolutionary interconnect architecture based on the pervasive use of diagonal routing. The X Initiative’s five-year mission is to provide an independent source of education about the X Architecture, to facilitate support and fabrication of the X Architecture through the semiconductor industry supply chain, and to survey usage of the X Architecture to track its adoption. Representing leaders spanning the entire design-to-silicon supply chain, X Initiative members include: Artisan Components, Inc.; ASML Netherlands B.V.; Cadence Design Systems, Inc.; Dai Nippon Printing (DNP); DuPont Photomasks, Inc.; Etec Systems, Inc., an Applied Materials, Inc. company; HPL Technologies, Inc.; Hoya Corporation; KLA-Tencor Corporation; Leica Microsystems AG; Matsushita Electric Industrial Co., Ltd.; MicroArk Co. Ltd.; Monterey Design Systems, Inc.; Nikon Corporation; Numerical Technologies, Inc.; NurLogic Design, Inc.; PDF Solutions, Inc.; Photronics Inc.; Prolific Inc.; RUBICAD Corporation; Sagantec; Sanyo Electric Co., Ltd.; Silicon Logic Engineering, Inc.; SiliconMap, LLC.; Silicon Valley Research Inc.; STMicroelectronics; Sycon Design, Inc.; Tensilica, Inc.; Toppan Printing Co.; Toshiba Machine Co., Ltd.; Toshiba Corporation; Virage Logic, Inc.; Virtual Silicon Technology, Inc.; and Zygo Corporation. Membership is open to all companies throughout the semiconductor supply chain. Materials can be found at www.xinitiative.org.
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