10/29/2002 - Xilinx announced early access of a new technology designed for both hardware and software engineers involved in the common design of programmable systems using Xilinx FPGAs with MicroBlazeTM and PowerPCTM processor cores. The new technology expands the company's current solution for programmable systems by enabling customers to define an entire system in ANSI-C to obtain the most optimal implementation by rapidly partitioning and repartitioning between hardware and software. The technology represents another solution from Xilinx in bringing system-on-a-chip to the masses, delivering lower system cost, higher performance and significantly improved productivity.
The technology is part of a series of system software products designed to extend the Xilinx Integrated Software Environment (ISE) into the realm of system-level design. In August, when the company introduced its latest ISE 5.1 software, Xilinx announced plans to deliver tools such as the co-design technology. Xilinx also announced its Embedded Development Kit - an all-encompassing design environment for embedded system development using Xilinx embedded processors which also provide foundational technology for the new co-design capability.
"This new co-design technology lays the groundwork for a common design environment that can be used by both hardware and software engineers to identify system bottlenecks, analyze the tradeoffs between hardware or software implementations and then create the most optimal implementation," said Rich Sevcik, senior vice president of FPGA Products at Xilinx. "With this technology, Xilinx provides engineers with groundbreaking tools to fully exploit the capability of the Virtex-II Pro platform for programmable systems, including on-demand architectural synthesis and high performance processing using the combination of FPGA fabric and processors on the same chip."
The technology provides a complete set of tools for designing, debugging and optimizing complex systems that use resources such as processors, RAM, DSP functions, high-speed I/O technology, and high density FPGA logic. The co-design tools are unique in the system design tool world with a library of hardware and software components, called Processing Elements (PE) optimized for particular functions. This capability enables the customer to use a best-in-class and domain-specific tool to create an optimized PE. A re-partition is a compile time switch, which enables one to profile, convert to a hardware/software implementation and debug in a matter of minutes rather than days or weeks. The hardware and software PEs come from a variety of sources, including Xilinx and third-party AllianceEDA, AllianceCORE, and Embedded Tools partners.
The announced co-design technology enables a true software-centric design paradigm as the technology re-uses proven hardware implementations in an ANSI-C based design flow. This opens up the capability of using the whole processing potential of the FPGA with embedded processor cores to the software design community.
Customers participating in an early engagement program began receiving an alpha version of the technology this month. Commercial release of the tools is expected in mid-2003.
About Xilinx ISE version 5.1i software environment
With ISE 5.1i, Xilinx is delivering "ASIC-strength" design tools to exploit the power of Virtex-II Pro silicon, ranging in device densities from 40,000 to more than eight million system gates. Designers are benefiting from a 2X improvement in compile times (an increase from 100,000 to 200,000 gate/min) and a 40 percent gain in device speeds over last year's software release. With an installed base of than 150,000 design seats, and more than 50 percent market share in the PLD industry, Xilinx ISE is widely regarded as the de facto standard methodology for programmable logic design.
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic and programmable system solutions.
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