10/8/2002 - CoWareTM and Denali Software jointly announced a solution that provides designers with an integrated platform for simulating memory and optimizing memory system performance for system-on-chip (SoC) designs. Denali's MMAVTM verification intellectual property (IP) software is now integrated with the CoWare N2C® system-level design environment.
By using Denali MMAV memory models in the CoWare N2C methodology, designers have access to robust simulation models for virtually any commercial memory device.
During simulation, the models provide valuable performance metrics for the memory system, and automatically test for potential design bugs at the memory interface. The C-based models from Denali are integrated directly with CoWare N2C, providing a seamless simulation and verification environment for advanced SoC development.
"The need to shorten the design cycle and increase system performance is crucial to success in the digital consumer electronics market," said Seiji Yamaguchi, Group Manager of EDA, Matsushita Electric Industrial, Semiconductor Company. "We use CoWare N2C to verify chips for digital consumer electronics products. The integration with Denali's MMAV enabled us to analyze the performance of our memory system without leaving the N2C environment. This gave us a tremendous advantage in evaluating the impact of various memory system configurations on overall system performance, and we were able to use the same memory models at a later stage during functional verification."
"Memory can make or break system performance in today's complex SoC designs," says David Lin, Denali's vice president of applications engineering. "The integrated solution from CoWare and Denali gives designers the ability to optimize the impact of memory decisions at the bottom line."
"Increasing bandwidth requirements from new applications, and lack of specialized tools for memory simulation and analysis has made the interface to memory one of the most critical bottlenecks in system design," adds Pete Hardee, director of product marketing at CoWare. "Designers using CoWare and Denali will have a tremendous advantage because they can quickly analyze the effects of various memory architectures on overall chip performance."
Pricing and Availability
The integrated solution is available immediately as part of the standard product package for Denali's MMAV and CoWare N2C.
As the leading supplier of tools for system-level electronic design automation (EDA), CoWare, Inc. provides a platform-based design methodology that can cut system-on-chip (SoC) design time in half. As a founder and leader of the Open SystemC Initiative, CoWare is driving the industry towards a unifying system design language. The CoWare software is employed by major systems, IP and semiconductor companies including Alcatel, ARM, Canon, Fujitsu, InterDigital, Matsushita, Motorola, Nokia, Samsung, Sanyo, Sony, STMicroelectronics, Tensilica, Toshiba and Xilinx. CoWare was recognized as the 5th fastest-growing private company in Silicon Valley in 2000 (1).
Denali Software Inc. is the world's largest provider of comprehensive solutions for memory system selection, design, integration, and verification. Denali's DatabahnTM product provides designers with the highest quality solution for producing memory controller cores for all of new and emerging DRAM memory technologies. Denali's MMAVTM product is the de facto industry standard for modeling and simulating memory during all phases of design and verification. Memory selection, memory controller configuration, and memory system performance analysis are supported through its online infrastructure at eMemory.com. More than 400 companies worldwide use Denali's tools, technology, and services to efficiently integrate new memory technologies into complex system designs for communication, consumer, and computer products.
CoWare and Interface Synthesis are trademarks and CoWare N2C is a registered trademark of CoWare, Inc. Databahn and MMAV are trademarks of Denali Software Inc.
(1) San Jose Business Journal
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