10/3/2002 - Celoxica Japan K.K announced that the VLSI Design and Education Center located in the University of Tokyo, Japan has adopted the DK Design Suite (DK). All the universities in Japan can acquire DK licences and support through VDEC by registering at the VDEC home page.
Celoxica’s DK Design Suite and development boards have been used since last spring as workshop materials in postgraduate courses of the Electrical and Electronic Engineering department at Tokyo University.
Prof. Masahiro Fujita of Tokyo University said, "VDEC is providing VLSI chip fabrication services to universities in Japan. With the recent trend of higher density chips and bigger design sizes, prototyping those chips using FPGA/PLDs and high-level automatic C-language design is becoming more and more important. Celoxica’s DK Design Suite is an ideal tool for this kind of purpose and provides a suitable design environment. We hope to see further LSI design starts as a result of DK adoption."
Colin Mason, General Manager & Representative Director of Celoxica Japan K.K. said, "We are very pleased that VDEC has chosen to host Celoxica DK technology on its servers and in this way make DK more widely and easily available throughout the entire Japanese university research community. We have been very satisfied with the growth of our Celoxica University Program in Japan and the contribution we are able to make to academia here. We hope to see these activities expand even further following the implementation of support through VDEC."
Celoxica University Programme
The announcement extends Celoxica's successful University Programme, to train a new generation of engineers in software-compiled system design and reconfigurable computing. The initiative aims to provide new skills that bridge the gap between embedded software development and electronic design automation, enabling software engineers to collaborate with hardware designers more closely to rapidly build faster, more flexible embedded systems. The programme also provides academic institutions with a commercial channel for IP.
About the DK Design Suite
The DK Design Suite targets the design, validation, iterative refinement and implementation of complex algorithms in hardware. It includes built-in design entry, simulation, and synthesis - all driven by Handel-C.
DK's integrated Handel-C-to-gate-level synthesis and optimisation eliminates the need for any interim HDL stage or the need to maintain any additional code stream. The integrated Handel-C compiler lets developers generate optimised EDIF netlists appropriate for targeting FPGAs using FPGA manufacturers' tools. In addition, DK can optionally generate VHDL for traditional ASIC flows.
An innovator in system-level electronic design automation (EDA), Celoxica is the technology leader for Software-Compiled System Design, a process that accelerates design productivity by using high-level languages to directly drive design verification and implementation. Celoxica provides tools and services that support the co-design, verification and implementation of hardware and software through a platform-based design methodology. By providing a proven route to hardware design using software techniques, the Celoxica solutions redefine hardware and software partitioning to uniquely enable the use of reprogrammable logic devices in the development of electronics and reconfigurable systems.
Celoxica, the Celoxica logo and Handel-C are the trademarks of Celoxica Limited.
Previous Page | News by Category | News Search
If you found this page useful, bookmark and share it on: