IC Tools News
- Sequence Design Offers Hands-on Power-aware Design Tutorial at DAC
- Synopsys Galaxy Design Platform Supported by Virage Logic
- SMIC Selects Synopsys Hercules for Layout Verification and Production Sign-Off
- Synopsys and Chinese Academy of Sciences Collaborate on System-On-Chip Labratory
- Mentor Graphics Tools Selected as Production Standards for SMIC
- Magma at the China International Semiconductor and Integrated Circuit Exhibition & Seminar
- Siemens Accelerates Timing Closure for High Performance ASIC With Synopsys Physical Compiler
- Synopsys and China's Ministry of Science and Technology Sign Agreement
- SMIC, Synopsys Develop Reference Flow For SMIC'S Advanced Processes
- LCX Software is Corelis Newest Value Added Partner
- SMIC, Cadence Partner for RTL-to-GDSII Reference Flow
- STMicroelectronics Selects Agilent's RFDE for RF/mixed-signal Design
- Cadence Advanced Package Designer Suite Automates Stacked-Die Wirebonding
- IBM, CMP to Help Companies and Universities Create SiGe Chip Designs
- NEC Micro Systems Joins MagmaTies Certified Design Center Program
- ARM, Cadence Collaborate on Design and Verification Solutions
- Synopsys Galaxy Design Platform Enhanced With SoCBIST Solution For Core-Based Designs
- ARM and Synopsys Announce Availability of Reference Methodology
- Philips Standardizes On Synopsys' Digital Front-End Design Platform
- Key ASIC Provider Completes Two Multi-Million Gate Chips With Synopsys' Physical Compiler
- Mentor Graphics Verifies ATI's High-performance Processors
- Cadence Tool Compresses Verification of Nanometer-scale Designs
- Mentor Graphics Improves Calibre RET Tools for Sub-100nm Nodes
- Synopsys Advances Verification Platform With Next Generation Testbench Technologies
- UMC Offers 90nm Design Rule Check for Mentor Graphics Calibre
- Magma OffersTruly Integrated Design Flow
- OpenAccess Coalition, Synopsys to Build Bridge Between OpenAccess and Milkyway
- Mentor Graphics Calibre Tool Suite is the Standard at Silterra Malaysia
- Magma's Ron Rohrer to Deliver Online Keynote Address for EDA Tools Cafe Virtual Trade Show
- Mentor Graphics Signs Agreement for Milkyway Database Integration
- Synopsys Galaxy New Frontier for Advanced Integrated Circuit Design
- NEC Tapes Out 10 Million+ Gates Networking Chip with Magma Software
- Magma Connects with Agere Systems to Deliver High-performance Computer Connectivity Systems on a Chip
- Magma Design Flow Used by Faraday to Validate Multiple Silicon Intellectual Properties for UMC's 90-nm Process
- Magma at the Electronic Design and Solutions Fair 2003
- Mentor Graphics Calibre Named Internal Standard for Physical Verification at GSMC
- Magma Granted Patent for Unified Data Model
- Mentor Graphics and UMC Strengthen Partnership with the Development of 0.18 Micron Mixed-Signal Design Kits
- IBM and Cadence Use Supercomputing Power of Linux in Leading Electronic Design Solutions
- Cadence and ATI Team to Form Broad Reaching Partnership
- Agilent Technologies collaborates with China Integrated Design Center to establish China's first SOC Engineering Testing Center
- VDEC Recommends Magma Design Software to Universities in Japan
- Cadence to Distribute Neolinear's Entire Product Line Throughout Asia
- Cadence and TSMC Team to Accelerate Time-to-Volume for Nanometer Design; Cadence is First Full-Line Distributor of TSMC-Developed Libraries
- Magma CEO Rajeev Madhavan to Speak At International Technology Conference in Hong Kong
- Cadence Extends Leadership in Parasitic Extraction With Agere Systems Technology
- 0-In Formal Verification Products Validate Complex National Semiconductor Bus Bridge Design
- Magma CEO Rajeev Madhavan to Speak at VLSI Conference January 7 in New Delhi
- IBM and Synopsys developing design reference flow for foundry customers
- Agere Systems Tapes Out 11 Million Gate System-On-Chip
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