FPGA, PLD, Configurable Processors News
- Lucent Selects Xilinx Virtex-II Pro with Embedded IBM PowerPC
- Xilinx Rolls Out Complete RapidIO Solution for Virtex-II Pro FPGAS
- Xilinx First to Achieve TL 9000 Registration for Product Category 8.1
- Altera Ships Two Million Cyclone FPGA Devices to Matsushita Electric
- Study Reveals Antifuse- and Flash-Based FPGAs Immune to Soft Errors
- Agilent Wins ElectronicaUSA Best of Show Award for FPGA Dynamic Probe
- Altera’s Cyclone FPGA Performs 70% Faster than Competitive Devices
- Benchmarks Reveal Stratix II FPGA Family as Performance Leader
- Altera Compares Competing FPGA Families in Web Seminar
- Altera's MAX II Devices Out Performs CPLD Competitors by 50%
- Nallatech Unveils Virtex-II Based High Performance FPGA Platforms
- Altera Wins EDN Innovation Award for HardCopy Stratix Structured ASIC
- Altera Lowers System Costs and Saves Time with CPLD Web Seminar
- Leopard Logic Rolls Out Reference Design for Gladiator CLD
- Leopard Logic Certifies Avnet Design Centers for Gladiator CLD
- Actel Ships More than 1 Million Flash-based ProASICPLUS FPGAs
- Accelerated Supports Xilinx Virtex-II Pro FPGAs with Nucleus Platform
- SBS Technologies, Celoxica to Shorten FPGA Computing Development Time
- electronicaUSA Conference Showcases Xilinx Technology
- Lattice Selects Fujitsu to Manufacture Leading-Edge FPGA Products
- Actel Turns Antifuse- and Flash-Based FPGA Product Families Green
- Miranda Selects Altera Stratix GX for SDI and HD-SDI Capabilities
- IPFlex, Fujitsu Debut DAP/DNA-2 Dynamically Reconfigurable Processor
- Altera Supports Cadence Allegro Platform with Stratix GX Design-in Kit
- Synopsys Debuts Design Compiler FPGA Synthesis for Prototyping ASICs
- Express Logic Supports Xilinx MicroBlaze, Virtex-II Pro with ThreadX RTOS
- Altera Discusses ASIC and FPGA Design Flow Synergy at SNUG
- Xilinx Proves Interoperability Between Virtex-II Pro and Intel IXP2800
- Leading EDA Vendors Support Altera's New Low-Cost MAX II Devices
- Altera Reduces Cost and Power Consumption with MAX II CPLDs
- Xilinx Showcases CPLD Solutions at Wireless Systems Design Conference
- Altera Launches MAX II Family with Radical New CPLD Architecture
- AMIRIX Unveils TimeSys Linux Software Development Kit for AP100 Family
- Celoxica Rolls Out RC300 and RC2000Pro High-Performance Evaluation Boards
- Triscend Unveils Development Platform for A7V Configurable SoC
- Synplicity Enhances Support for Xilinx's ISE 6.2I with FPGA Synthesis
- Altera Shows How to Design with New High-Density FPGAs
- FPGA Designers Benefit from CAST's Low-Volume IP Pricing Program
- Artesyn Showcases Altera-Powered ATCA AMC Carrier Card
- Pentek Rolls Out Configurable Logic VIM-2 Module with Dual FPGAs
- Synplify Pro Delivers Optimal Results for Altera's Stratix II Devices
- Intel Developer Forum Showcases Altera-Powered Applications
- Celoxica Unveils DK Design Suite 3.0 with Re-timing Synthesis
- Altera Demonstrates FPGA Synergy with TI DSP Technology
- Actel Returns to Mars with Radiation-Tolerant, Radiation-Hardened FPGAs
- Actel Debuts Radiation-Tolerant 250,000-gate RTAX250S FPGA
- SBS Expands FPGA Computing with Tsunami PC/104 Plus Processor Board
- Altera Customers Receive Quartus II Design Software for New Stratix II
- Altera to Discuss Role of FPGAs and 90-nm Design Challenges at DATE
- Memec Rolls Out Unique Automotive Development Kit for Actel FPGAs
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