Verification of Mixed-Signal Systems
BENCHMARKS COMPARING THE PROPOSED APPROACH VERSUS THE STANDARD ONE
Benchmarks Description To compare the standard approach in mixed-signal circuit simulation and the proposed one based on Mixed-Signal Verification Kit (MSV_Kit), three different cases with different level of complexity are considered:
» A band gap block to demonstrate the advantages of the proposed approach in a fully analogue environment
» The CAN transceiver showing an application for a real mixed-signal circuit
» A CAN node including a CPU to demonstrate the easy extension to very complex system
A Band Gap block is a common circuit able to generate a temperature independent output voltage level equivalent to the bang gap level of the silicon. It is one of the most common analogue cells playing a critical role in a complex circuit and for which verification is a MUST.
The main verification items for this cell are the following:
For each corner related to process parameters spread (model cards) exits a trimmer word such as, when BG_OK goes high,
Vout = VO ± e for every temperature value in a defined range
the static current from power supply is in specs
the settling time of the output voltage is in specs
The aim of the verification is to check if Vout is in the defined voltage range in the whole temperature range when the model card is fixed (set of process parameters used normally during corner analysis).
In each condition, the power supply current and the settling time are measured too and they are compared with the value reported in specification (transient simulations).
The CAN transceiver is a mixed-signal circuit interfacing the CAN protocol engine with the 2-wires physical layer (CANH and CANL).
One of the most important features of the CAN transceiver is its immunity towards faults injected on physical layer as stated in the standard conformal test ISO-11989-3. Faults are transient events appearing on the line for a variable time period. The reaction of the device can vary depending on:
- type of fault
- status of the physical layer (transmitted information or idle)
- previous faults
The verification items considered here for a fault tolerant CAN transceiver (fault recognition and recovering) is: during transition/receipt of a real CAN frame the transceiver has to detect and recover all possible faults defined in the specification and in all different combinations. The proposed verification environment includes other eRM compliant verification components as the CAN protocol engine verification component that allows the test of the transceiver with a real CAN frame.
Evaluation Criteria The verification process can be split in 3 main phase; each of them requires specific expertises and engineering time.
- Set up of all the necessary environment for simulations needed to extract the information related to the verification goals (environment set up)
- Simulations (note that simulation is the means by which the verification process is done)
- Evaluation of simulations results by collection and analysis of meaningful information (results collection & analysis)
An objective measure of the verification effort is the time (man-effort or run time) required to complete "properly" each phase. What does "properly" mean? It means to reach a good verification quality.
Quality evaluation is often not easy and it is subject to personal interpretation. It is possible to consider three main qualitative criteria as reported below.
| CRITERIA | DESCRIPTION | KEY WORDS |
| Verification Control | Verification results must be repeatable and independent of the engineers performing the task; The process must be influenced by simulations results possibly on the fly to increase the effectiveness. | automation, on-the-fly close loop process, methodology |
| Verification Coverage | Metrics to measure verification progress should be easy to applied in the verification flow, increase verification productivity and effectiveness, and reduce redundancy | coverage analysis, ability to reach corner case, stimuli randomization |
| Reusability | In horizontal direction (i.e. different blocks of the same type) and in vertical direction (i.e. different hierarchy or abstraction /complexity levels); reusability reduces risk of verification errors (reliability) and allows spending more effort in building verification environment (cost-sharing) | modularity, configuration capability |
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